Semiconductor memory, system, and method of operating semiconductor memory

Abstract

The invention discloses a semiconductor memory, a system, and a method of operating the semiconductor memory. A memory has memory cells in a matrix; a first selection unit selecting any of first signal lines in the memory cells, in response to an access request; a second selection unit selecting any of second signal lines in the memory cells, after the first selection unit starts operating; a first voltage generation unit generating a first power supply voltage supplied to the first selection unit; a second voltage generation unit generating a second power supply voltage supplied to the second selection unit, when a start-up signal is active; a switch short-circuiting first and second power supply lines, when a short-circuit signal is active; and a power supply voltage control unit which activates the start-up signal in response to the access request, activates the short-circuit signal after a predetermined time elapses since activation of the start-up signal, deactivates the short-circuit signal and the start-up signal after completion of access operations.

Description

technical field [0001] The present embodiment relates to a semiconductor memory having a low power consumption mode and a system in which the semiconductor memory is mounted. Background technique [0002] A method has been proposed by which, in a semiconductor memory such as a DRAM, if a row-related and a column-related circuit block are not operating, the supply of a power supply voltage to these circuit blocks is stopped, thereby reducing a leakage current flowing through a non-operating circuit block ( See, for example, Japanese Patent Application Laid-Open Nos. 2008-27547 and 2010-135047). There has also been proposed another method by which, in a DRAM, an operating frequency is identified based on a column address strobe (CAS) latency set in a mode register to change the generated internal power supply voltage using a voltage generating unit according to the identified operating frequency capability, thereby reducing power dissipation (for example, see Japanese Patent ...

AI Technical Summary

Problems solved by technology

However, the multiple circuit blocks do not always operate at maximum power dissipation

If the power supply voltage generating capability of the voltage generating unit is too large, the power dissipation of the semiconductor memory increases

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