Reconfigurable continuous time type high-speed low-power consumption sigma-delta modulator

Abstract

The invention belongs to the technical field of an integrated circuit, and particularly relates to a reconfigurable continuous time type high-speed low-power consumption sigma-delta modulator. The reconfigurable continuous time type high-speed low-power consumption sigma-delta modulator is formed by a configurable loop filter, a multi-digit quantizer and a feedback ADC (Analog to Digital Converter). According to a circuit structure, the loop filter adopts a third-order active RC (Remote Control) filter structure, the multi-digit quantizer is realized by adopting an interpolating method, and the feedback ADC adopts a high-speed dynamic element matching technology. According to the reconfigurable continuous time type high-speed low-power consumption sigma-delta modulator disclosed by the invention, under different bandwidth modes, the modulator can be switched between a distribution feedforward structure with a harmonic oscillator and a distribution feedback structure with a harmonic oscillator, and the optimization for the accuracy and the energy efficiency in various bandwidth areas can be realized in system level; continuous analog signal inputs can be converted into discrete digital signal outputs by the modulator in 1.2V power supply voltage, signal bandwidths can be configured in four modes of 5MHz, 10MHz, 15MHz and 20MHz, the accuracy can be up to 11-12 bits, and each frequency range of a wireless communication protocol LTE (Long Term Evolution) can be covered.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a reconfigurable continuous-time high-speed and low-power sigma-delta modulator. Background technique [0002] With the improvement of integrated circuit technology and the increasing market demand, the field of wireless communication is rapidly emerging. In order to reduce power consumption, improve system integration, and reduce design costs, a large number of signal processing functions are transferred from the analog domain to the digital domain from the receiver architecture, so the analog-to-digital converter (Analog to Digital Converter) has a tendency to transfer to the RF front end. But at the same time, the closer the analog-to-digital converter is to the front end of the receiver, the higher the requirements on the bandwidth of the analog-to-digital converter are, reaching megahertz-level applications. [0003] In the 1990s, due to the c...

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Problems solved by technology

Moreover, in the existing reconfigurable scheme, the sigma-delta modulator generally has the problem of low precision (about 10 bits) in high bandwidth mode

The main reason is that the feedback digital-to-analog converter has performance attenuation at high frequencies, and its nonlinearity limits the accuracy of the sigma-delta modulator; at the same time, in high-bandwidth mode, the deterioration of the accuracy caused by clock jitter is becoming more and more serious

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