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Power-on-reset circuit with low power consumption

A technology of electric reset and circuit, which is applied in the direction of data reset device, electrical components, electronic switches, etc.

Active Publication Date: 2015-04-08
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Internal capacitor and transistor gain can be significant contributors to the dynamic current which is usually proportional to the switching frequency

Method used

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  • Power-on-reset circuit with low power consumption
  • Power-on-reset circuit with low power consumption
  • Power-on-reset circuit with low power consumption

Examples

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Embodiment Construction

[0021] While the invention can be modified into various modifications and alternative forms, examples thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that these descriptions are not intended to limit the invention to the particular embodiments shown and / or described. On the contrary, the intention of these descriptions is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure.

[0022] One or more of the various disclosed embodiments may be applied to many different types of power-on-reset (POR) circuits, devices, methods, and structures for use with many different systems and devices. While the embodiments are not necessarily so limited, various aspects of the present disclosure can be understood using the context by discussion of examples.

[0023] Advanced power management modes and low-power standby states can effectively reduce dev...

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PUM

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Abstract

Methods, devices and circuits are provided for power-on-reset circuits with low static power consumption. One such circuit (100) includes a detector (104) that draws current from a supply voltage. The detector detects that the supply voltage has exceeded a trip-point voltage level and then disables current draw from the detector. The detector responds to an enable signal by enabling current draw from the detector. A pulse generator (106) generates a reset signal in response the supply voltage transitioning from a voltage below the trip point voltage level to above the trip point voltage level. A monitor (108) detects that the supply voltage has dropped and provides, in response thereto, the enable signal to the detector to enable current draw from the portion of the detector.

Description

technical field [0001] Aspects of the invention relate to power-on reset circuits. In some embodiments of the present invention, the power-on reset circuit has low or no static power consumption. Background technique [0002] Logic circuits, such as the synchronous logic of a microcontroller, usually, but not always, need to be initialized to be in a known state when powered up and / or powered down. To provide this initialization, a power-on-reset (POR) device may be used in a circuit, such as a microcontroller with associated logic. The circuitry of the POR device generates a reset pulse that initializes the logic points after the logic circuit's power supply ramps up. This reset pulse ensures that the logic starts in a known state, making the start-up of circuit behavior predictable. [0003] A power-on-reset circuit can function by monitoring the supply voltage and generating a pulse if the supply voltage transitions from a low state to a high state. This pulse can be ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/30H03K17/22
CPCH03K17/223G06F1/32G06F1/24
Inventor 安德·冈瑟凯文·马胡提
Owner NXP BV
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