Non-volatile memory with P+ floating gate electrode and preparation method thereof

Abstract

The invention relates to a non-volatile memory with a P+ floating gate electrode and a preparation method of the non-volatile memory with the P+ floating gate electrode. A memory cell is arranged at the upper part in a semiconductor substrate and comprises a PMOS (P-Channel Metal Oxide Semiconductor) access transistor, a control capacitor and a programming capacitor; a plurality of isolation grooves are arranged at the upper part of the semiconductor substrate, and isolation mediums are arranged in the isolation grooves so as to form field medium regions; the PMOS access transistor, the control capacitor and the programming capacitor in the memory cell are isolated from each other by the field medium regions; a gate dielectric layer is deposited on a first main surface of the semiconductor substrate, and covers the openings of the isolation grooves and the first main surface of the semiconductor substrate; and P+ floating gate electrodes are arranged right above the vertex angles of the isolation grooves on the two sides of the PMOS access transistor and the control capacitor, are positioned on the gate dielectric layer and are corresponding to the vertex angles of the corresponding isolation grooves. According to the non-volatile memory and the preparation method, the non-volatile memory and a CMOS (Complementary Metal Oxide Semiconductor) process are compatible, so that the data retention period is prolonged, and the using reliability of the non-volatile memory is improved.

Description

technical field [0001] The present invention relates to a kind of non-volatile memory and its preparation method, especially a kind of non-volatile memory with P+ floating gate electrode and its preparation method, specifically a kind of non-volatile memory which can improve data retention time A memory and a preparation method thereof belong to the technical field of integrated circuits. Background technique [0002] For system-on-chip (SoC) applications, it is the integration of many functional blocks into an integrated circuit. The most common SoCs include a microprocessor or microcontroller, static random access memory (SRAM) modules, non-volatile memory, and logic blocks for various special functions. However, conventional non-volatile memory processes, which typically use stacked-gate or split-gate memory cells, are not compatible with conventional logic processes. [0003] Non-volatile memory (NVM) technology is different from traditional logic technology. The comb...

AI Technical Summary

Problems solved by technology

The combination of non-volatile memory (NVM) technology and traditional logic technology will make the process a more complex and expensive combination; since the typical usage of NVM for SoC applications is in relation to the overall The chip size is small, so this practice is not advisable

At the same time, due to the working principle of the existing non-volatile memory, the written data is easily lost, which affects the reliability of use

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