Non-volatile memory for improving data storage time and method for producing non-volatile memory

Abstract

The invention relates to a non-volatile memory for improving the data storage time and a method for producing the non-volatile memory, wherein a memory cell is arranged at the inner upper part of a semiconductor baseplate of the non-volatile memory; the memory cell comprises a P-channel metal oxide semiconductor (PMOS) access transistor, a control capacitance and a programmable capacitance; a plurality of isolation grooves are arranged at the inner upper part of the semiconductor baseplate, and isolation dielectric is filled in the isolation grooves for forming domain dielectric areas; the PMOS access transistor, the control capacitance and the programmable capacitance which are arranged in the memory cell are isolated from each other through the domain dielectric areas; a gate dielectric layer is deposited on a first primary side of the semiconductor baseplate, and covers the openings of the isolation grooves and the first primary side of the semiconductor baseplate; and P plus floating gate electrodes are arranged at the two sides of the PMOS access transistor and the programmable capacitance, are positioned on the gate dielectric layer and correspond to the vertical angles of the corresponding isolation grooves. The non-volatile memory can be compatible to a complementary metal oxide semiconductors (CMOS) logic technology, the data retention time is prolonged, and the use reliability of the non-volatile memory is improved.

Description

technical field [0001] The invention relates to a non-volatile memory and a preparation method thereof, in particular to a non-volatile memory with improved data storage time and a preparation method thereof, belonging to the technical field of integrated circuits. Background technique [0002] For system-on-chip (SoC) applications, it is the integration of many functional blocks into an integrated circuit. The most common SoCs include a microprocessor or microcontroller, static random access memory (SRAM) modules, non-volatile memory, and logic blocks for various special functions. However, conventional non-volatile memory processes, which typically use stacked-gate or split-gate memory cells, are not compatible with conventional logic processes. [0003] Non-volatile memory (NVM) technology is different from traditional logic technology. The combination of non-volatile memory (NVM) technology and traditional logic technology will make the process a more complex and expen...

AI Technical Summary

Problems solved by technology

The combination of non-volatile memory (NVM) technology and traditional logic technology will make the process a more complex and expensive combination; since the typical usage of NVM for SoC applications is in relation to the overall The chip size is small, so this practice is not advisable

At the same time, due to the working principle of the existing non-volatile memory, the written data is easily lost, which affects the reliability of use

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