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Method and structure for testing metal-oxide-semiconductor field-effect transistor (MOSFET)

A field-effect transistor and test structure technology, which is applied in the direction of single semiconductor device testing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of electrical characteristic parameters and mismatch parameter errors, reduce the accuracy of testing MOSFETs, etc., and achieve To avoid the effect of parasitic resistance

Active Publication Date: 2013-06-19
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] Further, due to the parasitic resistance Rs between the pad of the MOSFET source and the metal lead 2 between the tested device MOSFET, the electrical characteristic parameters and mismatch parameters obtained by the test calculation, and the electrical characteristic parameters and the mismatch parameters of the MOSFET in actual work There are errors in the mismatch parameters, which reduces the accuracy of testing MOSFETs

Method used

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  • Method and structure for testing metal-oxide-semiconductor field-effect transistor (MOSFET)
  • Method and structure for testing metal-oxide-semiconductor field-effect transistor (MOSFET)
  • Method and structure for testing metal-oxide-semiconductor field-effect transistor (MOSFET)

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Embodiment Construction

[0027] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0028] It can be seen from the prior art that the reason for the inaccuracy of the MOSFET test is because figure 1 The test structure shown has a parasitic resistance Rs on the metal lead between the MOSFET source pad and the MOSFET under test, so the Idsat of the tested MOSFET is smaller than the actual one, and the threshold voltage is larger than the actual one. Therefore, the electrical characteristic parameters and mismatch parameters of the finally obtained MOSFET test are inaccurate. In order to overcome this defect, the present invention resets the test structure of the MOSFET, which avoids the parasitic resistance on the metal lead between the source of the MOSFET and the MOSFET of the device under test.

[0029] Further, the test structure co...

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Abstract

The invention discloses a structure for testing an MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), wherein a test platform is used for testing the MOSFET through weld pads led from the MOSFET. The structure comprises the MOSFET and metal lead wires; and the structure further comprises two source electrode pads, a drain electrode pad, a grid electrode pad and a voltage-sensing pad, wherein the two source electrode pads are respectively connected with two source electrodes of the MOSFET; the drain electrode pad is connected with a drain electrode of the MOSFET through the metal leadwires; the grid electrode pad is connected with a grid electrode of the MOSFET through the metal lead wires; and the voltage-sensing pad is connected with a drain electrode of the MOSFET through the metal lead wires. The invention further provides a method for testing the MOSFET. With the adoption of the testing structure and the testing method disclosed by the invention, the accuracy for testingthe MOSFET is enhanced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a testing method and testing structure of a semiconductor field effect transistor (MOSFET). Background technique [0002] Currently, when testing MOSFETs, such as figure 1 As shown in the test structure, the test structure includes a device under test 1 and metal leads. The device under test 1 is connected to a plurality of test pads (pads) through metal leads 2 , and these pads can be connected to a test machine, so that the test machine can test the MOSFET through these pads. Wherein, the multiple test pads include: a source pad4: connected to the source of the MOSFET through metal leads; drain pad2 and drain pad3, connected to the two drains of the MOSFET through metal leads; a gate The electrode pad1 is connected to the gate of the MOSFET through a metal lead. For the convenience of description, the metal lead connecting the gate pad1 and the gate of the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/544G01R31/26
CPCH01L2924/0002
Inventor 邵芳
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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