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Static random access memory on silicon substrate of insulator and manufacturing method thereof

A static random access, silicon-on-insulator technology, used in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc. Effect

Active Publication Date: 2011-09-07
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The technical problem to be solved by the present invention is to provide a static random access memory formed on a silicon-on-insulator substrate and a manufacturing method thereof, so as to solve the problem of the floating body effect of the static random access memory on a silicon-on-insulator substrate

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  • Static random access memory on silicon substrate of insulator and manufacturing method thereof
  • Static random access memory on silicon substrate of insulator and manufacturing method thereof
  • Static random access memory on silicon substrate of insulator and manufacturing method thereof

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Embodiment Construction

[0036] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0037] The static random access memory formed on the silicon-on-insulator substrate provided by the present invention and its manufacturing method can be realized in many alternative ways, and the following is illustrated by a preferred embodiment, and of course the present invention is not limited to this specific Examples, general replacements known to those skilled in the art undoubtedly fall within the protection scope of the present invention.

[0038] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of illustration, the schematic diagrams are not partially enlarged according to the general scale, which should not...

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Abstract

The invention provides a static random access memory on silicon substrate of an insulator and a manufacturing method thereof. The adjacent and different types of transistors are isolated from each other by a shallow trench so that the source areas of the adjacent and different types of transistors are completely isolated; the latch-up effect in the silicon substrate does not generate; meanwhile, the adjacent and the same kind of transistors are isolated by an ultra-shallow trench so that body areas among the adjacent and the same kind of transistors are communicated with each other; ions are injected in the source areas on the communicated area in a plurality of memory units to form derivation areas of the body areas, which have the same doping type as the body areas and are in contact with the body areas; and a floating body effect of the communicated area in the memory units can be removed by each derivation area of each body area. The static random access memory formed on the silicon substrate of the insulator reduces the number of the derivation areas of the body areas and the area of a device effectively and eliminates the floating body effect of the body areas.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a static random access memory formed on a silicon-on-insulator substrate and a manufacturing method thereof. Background technique [0002] According to the data storage method, semiconductor memory is divided into dynamic random access memory (DRAM), non-volatile memory and static random access memory (SRAM). SRAM has established its unique advantage by being able to achieve fast operating speeds in a simple and low power consumption manner. Also, compared to DRAM, SRAM is relatively easy to design and manufacture because it does not need to periodically refresh the stored information. [0003] Typically, an SRAM cell consists of two drive transistors, two load devices, and two access transistors. A conventional full CMOS SRAM circuit in figure 1 shown in . Such as figure 1 As shown, a first inverter INV1 and a second inverter INV2 constitute a latch, and...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11H01L29/06H01L21/8244H01L21/762H10B10/00
Inventor 胡剑
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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