Preparation method of diode chip on P+ substrate and structure of diode chip

Abstract

The invention discloses a preparation method of a diode chip on a P+ substrate and a structure of the diode chip. The method comprises the following steps of: directly forming a P- epitaxial layer on the P+ substrate through epitaxy; forming a P+ well through filling boron; annealing a P well; forming an N- ring region through photoetching and etching; annealing the N- ring; forming an N+ main junction region through photoetching and etching; annealing the N+ main junction region; evaporating or sputtering A1 as a positive electrode and the like. In the structure, special structures of the P-epitaxial layer, the P+ well and an N- voltage dividing ring device, and an N+ arsenic filling process are adopted to ensure that the N+/P+ is broken down on a plane and to avoid lateral breakdown; the voltage of a diode formed on the P+ substrate is reduced to be lower than 5.1V, the lowest voltage can reach 2.0V, and leakage current is within 100uA, so that the uniformity of the voltage in the chip is ensured to be within 5%; and in fact the diode is a P-N junction formed by the P well and an N+ region. The structure is successfully applied to the fields of a low-voltage voltage-regulator diode and a low-voltage transient voltage suppressor diode.

Description

technical field [0001] The invention relates to the field of semiconductor chip manufacturing, in particular to a low-voltage diode chip and a manufacturing method thereof. Background technique [0002] Compared with high-voltage diodes, low-voltage diodes have special requirements on the structure and manufacturing process of the device, which is mainly due to the large leakage of low-voltage diodes. Theoretically, low-voltage diodes are composed of P+ / N+ structures with extremely high concentrations on both sides, which belong to Zener breakdown (also called tunnel breakdown), the breakdown point of the I-V curve is soft, and the reverse leakage is large. Therefore, if N+ is directly injected into a very dense P+ substrate to form a P+ / N+ junction, although the voltage may reach below 5.1V, the leakage will reach the milliampere level, basically unable to form a diode with good performance. See figure 1 , a brief introduction is as follows: [0003] First implant a laye...

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Problems solved by technology

[0006] The purpose of the present invention is in order to overcome the defect in the above-mentioned prior art, has proposed the technical scheme that solves two problems of 2.0V-5.1V low-voltage diode (P+ substrate) electric leakage too large and internal voltage uniformity difference, has proposed a kind of Method and structure for preparing low-voltage diode chip on P+ substrate

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