Ion implantation zone forming method, MOS transistor and manufacture method thereof

Abstract

The invention discloses an ion implantation zone forming method, an MOS transistor and a manufacture method thereof, wherein the ion implantation zone forming method comprises the following methods: carrying out the ion implantation for forming a trap implantation zone; carrying out the ion implantation for forming a first groove implantation zone; carrying out the iron implantation for forming asecond groove implantation zone which is positioned between source / drain zones to be formed; carrying out iron the implantation for forming a threshold voltage implantation zone; and carrying out thermal annealing treatment. The invention additionally forms the groove implantation zones between the source / drain zones in a semiconductor substrate, effectively baffles the mutual penetration betweenthe source / drain zones, improves the short groove effect of semiconductor devices, avoids the overrun effect and the punch-through effect between the source / drain zones, improves the electric performance of the semiconductor devices, and simultaneously provides a larger process regulation space for the reduction of junction capacitance in the ultra shallow junction process and the expansion of a process window.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming an ion implantation region in a well structure, a MOS transistor and a manufacturing method thereof. Background technique [0002] Metal-oxide-semiconductor (MOS) transistors are the main driving force as semiconductor devices move toward high density and small size. The driving current and hot carrier injection are the two most important parameters in the design of MOS transistors. The traditional design obtains the expected performance by controlling the doping shape of the gate dielectric layer, channel region, well region, source / drain extension region, pocket implant (Pocket Implant) region, source / drain region implant shape and thermal budget, etc. . [0003] As the channel length of the MOS device becomes shorter, the depletion regions of the source / drain regions are too close to each other, which will lead to undesired punch-thro...

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Problems solved by technology

[0006] The problem solved by the present invention is: in the manufacturing process of semiconductor devices, how to improve the junction capacitance and junction leakage in the short channel effect, and avoid the problems of overflow or punch-through between the source / drain regions and the deterioration of electrical performance

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