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Method for flattening surface of polysilicon

A surface planarization and polysilicon technology, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of reducing device reliability and service life, and achieve uniform etching rate, uniform distribution trend, polysilicon flat surface effect

Inactive Publication Date: 2009-11-04
PEKING UNIV FOUNDER GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This concave polysilicon surface produces spike discharges when high voltages are applied, reducing device reliability and lifetime

Method used

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  • Method for flattening surface of polysilicon
  • Method for flattening surface of polysilicon
  • Method for flattening surface of polysilicon

Examples

Experimental program
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Effect test

Embodiment 1

[0043] In the present embodiment, the operating condition of rapid thermal oxidation is: temperature is 1100 ℃, O 2 The flow rate is 8SLM (liters per minute under standard conditions), and the time for rapid thermal oxidation treatment is 3 minutes;

[0044] The power of penetration etching is 400W, the pressure is 100 mTorr, and the etching gas is CF 4 , and its flow rate is 35sccm;

[0045] The power of the main etching is 500W, the pressure is 45mTorr, and the etching gas and its flow rate are respectively 40sccmCl 2 / 60sccmHBr;

[0046] The power of over-etching is 300W, the pressure is 110mTorr, and the etching gas and its flow rate are respectively 20sccmCl 2 / 60sccmHBr / 5sccmHe-O 2 .

[0047] Figure 4 It is the process flow diagram of polysilicon surface planarization of the present invention, in conjunction with image 3 , Figure 4 Shown in A~4H, the method for planarizing the polysilicon surface of the present invention comprises the following steps:

[0048...

Embodiment 2

[0065] In the present embodiment, the operating condition of rapid thermal oxidation is: temperature is 900 ℃, O 2 The flow rate is 7SLM, and the time for rapid thermal oxidation treatment is 5 minutes;

[0066] The power of penetration etching is 250W, the pressure is 75 mTorr, and the etching gas is CF 4 , and its flow rate is 30 sccm;

[0067] The power of the main etching is 400W, the pressure is 40mTorr, and the etching gas and its flow rate are respectively 30sccmCl 2 / 30sccmHBr;

[0068] The power of over-etching is 250W, the pressure is 40mTorr, and the etching gas and its flow rate are respectively 30sccmCl 2 / 30sccmHBr / 8sccmHe-O 2 .

[0069] The method for planarizing the polysilicon surface of the present invention comprises the following steps:

[0070] b1) A high-temperature thermal oxide layer is grown on the surface of the single crystal silicon substrate 1, and then tetraethoxysilane is deposited on the high-temperature thermal oxide layer, and tetraethox...

Embodiment 3

[0085] In the present embodiment, the operating condition of rapid thermal oxidation is: temperature is 1100 ℃, O 2 The flow rate is 8SLM (liters per minute under standard conditions), and the time for rapid thermal oxidation treatment is 3 minutes;

[0086] The power of penetration etching is 450W, the pressure is 120mTorr, and the etching gas is CF 4 , and its flow rate is 50 sccm;

[0087] The power of the main etching is 450W, the pressure is 80mTorr, and the etching gas and its flow rate are respectively 50sccmCl 2 / 80sccmHBr;

[0088] The power of over-etching is 250W, the pressure is 120mTorr, and the etching gas and its flow rate are respectively 50sccmCl 2 / 80sccmHBr / 5sccmHe-O 2 .

[0089] The method for planarizing the polysilicon surface of the present invention comprises the following steps:

[0090] c1) Using a high temperature process to grow silicon dioxide SiO on the surface of the single crystal silicon substrate 1 2 , to serve as hard mask 2, such as ...

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Abstract

The invention discloses a method for flattening the surface of polysilicon, comprising the following steps: (1) growing a hard masking film on the surface of the polysilicon, coating photoresist on the surface of the hard masking film, where the hard masking film is raised, and carrying out photoetching and developing to expose the hard masking film to be etched; (2) etching the exposed hard masking film, removing left photoresist, etching a groove in the polysilicon below the etched hard masking film, and removing the photoresist left on the surface of the polysilicon; (3) etching the bottom of the etched groove in a filleting way, forming a gate oxidizing layer on the surface of the etched groove, and using the polysilicon settled in the groove as a gate electrode; (4) rapidly and thermally oxidizing the polysilicon settled in the groove; and (5) etching rapidly and thermally oxidized polysilicon once again.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to a method for flattening the surface of polysilicon. Background technique [0002] With the rapid development of the integrated circuit (IC) industry, VLSI has a strong demand for surface planarization with the continuous miniaturization of line width. At present, the commonly used planarization method in the polysilicon integrated circuit process is the etch-back method, such as figure 1 As shown, its basic technological process is: [0003] Step 101, growing a hard mask on the silicon surface; [0004] Step 102, coating photoresist on the surface of the grown hard mask, performing photolithography and developing to reveal the hard mask to be etched; [0005] Step 103, etching away the exposed hard mask, and then removing the remaining photoresist; [0006] Step 104, etching the silicon under the etched hard mask to form trenches, and then removing the remaini...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/316H01L21/311H01L21/3065H01L21/336
Inventor 王托猛江瑞星蔡新春陈勇
Owner PEKING UNIV FOUNDER GRP CO LTD
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