Methods for quantitatively evaluating the quality of double patterning technology-compliant layouts

Abstract

A method for fabricating an integrated circuit is disclosed that includes, in accordance with an embodiment, providing a double patterning technology-compliant logical design for the integrated circuit, the logical design including a plurality of elements; scoring the design of one or more of the plurality of elements to produce a design score; modifying the design based at least in part on the design score; generating a mask set implementing the modified logical design; and employing the mask set to implement the logical design in and on a semiconductor substrate.

Description

TECHNICAL FIELD[0001]The present invention generally relates to methods for fabricating an integrated circuit, and more particularly relates to methods that include scoring the quality of double patterning technology-compliant integrated circuit design layouts.BACKGROUND[0002]There is a continuing trend within the microelectronics industry to incorporate more circuitry having greater complexity on a single integrated circuit (IC) chip. Maintaining this trend generally entails shrinking the size of individual devices within the circuit by reducing the critical dimensions (CDs) of device elements along with the pitch, or the CD of such an element added to the spacing between elements. Microlithography tooling and processing techniques play an important role in resolving the features necessary to fabricate devices and accordingly, are continually under development to meet industry milestones relating to the CD and pitch characteristic of each new technology generation.[0003]High numeri...

AI Technical Summary

Benefits of technology

The patent text describes methods for fabricating an integrated circuit using double patterning technology, which complies with certain design rules and requirements. The methods include identifying specific elements in the design, scoring those elements based on a scoring system, and modifying the design to improve the scoring. The ultimate goal is to create a high-quality integrated circuit design that can be successfully implemented on a semiconductor substrate. The technical effects of this patent are improved efficiency and accuracy in designing integrated circuits using double patterning technology, leading to higher quality and reliability of the finished product.

Problems solved by technology

The lack of an evaluation methodology can be a significant handicap when comparing the performance of alternative DPT-compliant solutions and competing decomposition algorithms.

Images