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Audio and video processing apparatus

a technology of audio and video processing and processor chip, which is applied in the direction of color television with bandwidth reduction, selective content distribution, television systems, etc., can solve the problems of increasing the cost and number of chips, the mpeg-2 decoder chip does not support the latest compression standards and algorithms, and the audio/video standards are evolving at a fast pace, so as to achieve efficient and configurable data communication.

Inactive Publication Date: 2009-12-24
MIMAR TIBET
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0031]The present invention integrates four programmable processors on a single semiconductor chip, where each processor is a standard RISC type and uses the unified external memory. Data transfers between multiple processors use multiple packet-based unidirectional communication channels via hardware-assisted circular queues in unified memory. These buffers provide an efficient and configurable way of data communication between multiple processors without any data contentions and stall conditions. The video processor is 32- or 64-wide SIMD processor coupled to a regular RISC processor as a dual-issue processor, where during each clock cycle one RISC and one SIMD instruction is executed. Video processor uses a dual-port data buffer and descriptor-based DMA transfers concurrent with processing, instead of the traditional cache structure.

Problems solved by technology

This increases the cost and number of chips significantly.
Some of building blocks such as MPEG-2 decoder chip do not support the latest compression standards and algorithms.
This represents a problem because audio / video standards are evolving at a fast pace.
These have significant problems.
First, these processors do not provide the processing power to handle all video and audio functions.
As a result, significant compromises have been made in software implementation, which lowers the resultant quality of video and audio.
Second, combining these characteristically different tasks on a single processor core reduces the efficiency significantly.
The task switching between these multiple audio, video, and system tasks require several hundred-clock cycles, which further reduce the efficiency.
Furthermore, the developers' task of integrating audio, video, stream, and system functions into a single core unit's multiple tasking becomes formidable.
However, the shared memory contentions and the difficulty of programming made such an approach failure, and as a result this processor has been discontinued.
These devices also lack the direct interfaces to connect to external devices as required.
These devices also lack the high-quality video output scaler for converting internal resolution to match to resolution of the display device.
High quality video scaling, by itself, exceeds the processing capabilities of some of these processors.
Manufacturers of next generation TVs are unable to differentiate their picture quality from one another because today, all merchant video processing ICs for video enhancement are fixed function.

Method used

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Embodiment Construction

[0049]The present invention uses four processors on a single semiconductor chip, each to implement separate functionality, as shown in Table 1. The advantage of using separate processors is that there is no need for time-consuming overhead of task switching, and therefore the efficiency is higher. Also, the implementation is much simpler. Each processor is a C programmable RISC type processor that is well proven with stable development tools. Each processor's clock speed is independently controlled to match the processing capabilities needed, dynamically or statically, and for power consumption reduction the clock rate is reduced under software control.

[0050]The unified memory, external or internal to the semiconductor chip, stores all processors' instruction memory, and all data that is buffered between processors and for input / output ports. Unified memory is typically a SDRAM, which is connected to the on-chip memory controller. Upon startup, the Flash memory containing program in...

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PUM

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Abstract

The present invention performs video and audio compression / decompression, video input and output scaling, video input and output processing for enhancement, and system layer functions on a single semiconductor chip. The media processor is compromised of video processor with a SIMD vector engine, audio processor, stream processor, system processor, and video scalers, LUTs and hardware blender. Unified memory architecture is used where these four processors use a shared memory for data and instructions. Data transfers between multiple processors use multiple packet-based unidirectional communication channels via hardware-assisted circular queues in unified memory. The video processor is a SIMD processor coupled to a regular RISC processor as a dual-issue processor. Such integrated and programmable functionality provides implementation of multiple video and audio for compression standards and programmable video enhancement. Important applications of this include Digital TV, IP Video Phone, and Digital Camcorder / Camera.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]This application claims priority under 35 U.S.C 119(e) from co-pending U.S. Provisional Application No. 60 / 354,335 filed on Feb. 4, 2002 by Tibet Mimar entitled “Audio and Video Processing Apparatus”, and from co-pending U.S. Provisional Application No. 60 / 364,315 filed on Mar. 14, 2002 by Tibet Mimar entitled “Vision Processor”, the subject matter of which is fully incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to an integrated media processor chip, which performs video, audio, system, and network connectivity functions.[0004]2. Description of the Background Art[0005]Existing media processing devices take many different shapes, sizes, and costs. These computing devices range from single-fixed function chips to programmable processor chips. These devices are used in set-top boxes, DVD players, digital cameras / camcorders, as well as the emerging digital TV mar...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H04N7/12
CPCH04N21/42607G06T1/20
Inventor MIMAR, TIBET
Owner MIMAR TIBET
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