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Multi-Input, Multi-State Switching Functions and Multiplications

a multi-state switching and multi-input technology, applied in the field of multi-input (2 or more) functions, can solve the problems of potentially power consumption in applications and lower clock rates, and achieve the effect of reducing the number of steps and possibly the number of components

Inactive Publication Date: 2009-03-19
LABLANS PETER
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

"The present invention provides a method and apparatus for generating an n-state symbol from an n-state logic function using a truth table. This reduces the number of steps and components required for the process. The invention also includes a computer device for performing a multiplication of radix-n digits with a multiplier of radix-n digits. The technical effects of the invention include improved efficiency and speed in generating n-state symbols and reduced complexity of the circuitry required for the process."

Problems solved by technology

This may lower clock rates and potentially power consumptions in applications such as digital filters and other digital signal processing applications.

Method used

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  • Multi-Input, Multi-State Switching Functions and Multiplications
  • Multi-Input, Multi-State Switching Functions and Multiplications
  • Multi-Input, Multi-State Switching Functions and Multiplications

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Embodiment Construction

[0056]Aspects of the present invention provide novel implementation of n-valued with n>2 and / or binary logic functions for replacing a first n-valued logic function with 3 or more inputs that have inverters in at least one input and possible in all inputs, with an implementation of a single truth table, the single truth table being the first truth table that is modified in accordance with the multipliers at the input. It will be shown that one can modify the truth table, which usually is a p-dimensional truth table for a p-input function, of the function by another truth table that is modified according to the inverters at the inputs. Such reduction of n-valued truth tables can, as in the 2-input case, be applied to any n-valued truth table of functions with p inputs. Immediate application can be applied to evaluating a p-input radix-n partial product (a1b1+a2*b2+a3*b3+ . . . ap*bp) wherein a1 a2 a3 . . . ap are n-valued variable digits in a radix-n number and b1 . . . bp are consta...

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Abstract

Methods to create an implementation for a multi-input n-state logic function with at least one inverter at an input by modifying the truth table according to the inverter into a reduced truth table are provided. Implementations of the reduced truth table by gates and inverters are also disclosed. Applying reduced truth tables in n-state multiplications are also provided. N-state multiplications may be used in filters, Digital Signal Processing or in Linear Feedback Shift Registers (LFSRs). Using implementations of reduced truth tables in n-state multiplications are disclosed.

Description

STATEMENT OF RELATED CASES[0001]This application is a continuation-in-part of U.S. patent application Ser. No. 11 / 018,956, filed on Dec. 20, 2004 and of U.S. patent application Ser. No. 11 / 679,316 filed on Feb. 27, 2007 which are both incorporated herein by reference. This application also claims the benefit of U.S. Provisional Patent Application Ser. No. 60 / 987,240, filed on Nov. 12, 2007, which is incorporated herein by reference in its entirety.BACKGROUND OF THE INVENTION[0002]This invention relates to the implementation of multi-input (2 or more) functions such as multiplications in multi-valued logic and multi-state switching. More specifically it relates to calculating a multi-valued or radix-n product by determining partial products based on 2 or more inputs into multi-valued switching functions.[0003]Current multipliers, for instance multipliers of a multi-digit variable with a multi-digit constant are pre-dominantly implemented in binary logic or by binary methods. The inve...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F7/38
CPCG06F7/49
Inventor LABLANS, PETER
Owner LABLANS PETER
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