Autonomic SMT System Tuning

Abstract

Methods, systems, and media are disclosed for autonomic system tuning of simultaneous multithreading (“SMT”). In one embodiment, the method for autonomic tuning of at least one SMT setting for an optimized processing, such as via throughput, latency, and power consumption, of a workload on a computer system includes calling, by a kernel, an SMT scheduler having at least one hook into a genetic library. Further, the method includes obtaining, by the SMT scheduler through the at least one hook, genetic data from the genetic library for the optimized processing of the workload. Further still, the method includes tuning, by the SMT scheduler and based on the obtaining, the at least one SMT setting for at least one cpu of the computer system.

Description

CROSS REFERENCE[0001]This application is a continuation application of U.S. patent application Ser. No. 10 / 965,152 entitled AUTONOMIC SMT SYSTEM TUNING, attorney docket number AUS920030885US1 (4066), filed Oct. 14, 2004, the disclosure of which is incorporated herein in its entirety for all purposes.FIELD OF INVENTION[0002]The invention generally relates to autonomic system tuning of simultaneous multi-threading (“SMT”). More particularly, the invention relates to methods, systems, and media for autonomic system tuning of SMT by employing a genetic algorithm to determine whether to turn SMT on or off depending on the particular workload, whereby turning on SMT only enhances processor performance.BACKGROUND[0003]Many programming languages, operating systems, and other software development environments support “threads of execution,” or, as more commonly called, “threads.” Threads are similar to processes, which are tasks that take turns running on the central processing unit (cpu) of...

AI Technical Summary

Benefits of technology

[0013]Embodiments of the invention generally provide methods, systems, and media for autonomic system tuning of SMT. In one embodiment, the method for autonomic tuning of at least one SMT setting for optimized processing of a workload on a computer system includes calling, by a kernel, an SMT scheduler having at least one hook into a genetic library. Further, the method includes obtaining, by the SMT scheduler through the at least one hook, genetic data from the genetic library for the optimized processing of the workload. Depending on the performance metric at issue, the optimized processing is realized through increased throughput, minimized latency, minimized, power consumption, or another metric that the user seeks to optimize for a workload through autonomic tuning of SMT. The method also includes tuning, by the SMT scheduler and based on the obtaining, the at least one SMT setting for at least one cpu of the computer system.

[0015]In yet another embodiment, the invention provides a machine-accessible medium containing instructions for autonomic tuning of at least one SMT setting for optimized processing of a workload on a computer system, which when executed by a machine, cause the machine to perform operations. The instructions generally include operations for calling, by a kernel, an SMT scheduler having at least one hook into a genetic library. The instructions further include operations for obtaining, by the SMT scheduler through the at least one hook, genetic data from the genetic library for the optimized, processing of the workload. Depending on the performance metric at issue, the optimized processing is realized through increased throughput, minimized latency, minimized power consumption, or another metric that the user seeks to optimize for a workload through autonomic tuning of SMT. Further still, the instructions include operations for tuning, by the SMT scheduler and based on the obtaining, the at least one SMT setting for at least one cpu of the computer system.

Problems solved by technology

Multitasking for general tasks is often fairly difficult because various programs holding internal data, known as state.

However, if another copy of the program is running on another processor, the two copies can interfere with each other by both attempting to read and write their state at the same time.

Another problem is that processors often use a speed-increasing technique known as caching in which small pools of very fast memory are associated with each processor in order to allow them to work with temporary values very quickly.

This can lead to a situation in which each processor is working in a separate cache, rather than in the shared memory; changes to a processor's local cache will not be communicated to other processors until the contents of the cache are written to shared memory.

This cannot be helped via programming techniques because it is invisible to the programs themselves.

Operating system functions are typically mapped into each virtual address space and interrupt handling typically runs in whichever memory context is in place when the interrupt occurs, so programs are still vulnerable to malfunctioning system code.

This can create problems if a thread is waiting for a resource to become available.

The disadvantage to preemptive multithreading is that the system may make a context switch at an inappropriate time, causing priority inversion or other bad effects which may be avoided by cooperative multi threading.

Despite advantages often obtained in processor performance through SMT, problems remain.

Recent state of the art reports indicate that always enabling SMT is not always beneficial.

In fact, performance of some applications with SMT enabled results in detrimental effects; performance is known to drop by as much as half.

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