IP-based LSI design system and design method

a design system and lsi technology, applied in the field of so-called, can solve the problems of increasing design man-hours, low design efficiency, and considerable design man-hours for new designs, and achieve the effect of reducing design man-hours and improving design efficiency in ip-based lsi design

Inactive Publication Date: 2006-02-16
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0009] It is an object of the present invention to reduce design man-hours and improve design efficiency in IP-based LSI design.

Problems solved by technology

Thus, consideration must be given to data consistency between each of the IPs and the communication channel, which increases design man-hours.
Moreover, when an IP that realizes a certain function is selected, it is very rare that the selected IP can be used for an LSI to be newly designed as it is, and considerable design man-hours are necessary for new designs, revisions and verifications.
Furthermore, a power control circuit exclusively used for the LSI needs to be designed manually, so that design efficiency is low.

Method used

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  • IP-based LSI design system and design method

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0045]FIG. 1 is a conceptual diagram illustrating IP-based LSI design. As shown in FIG. 1, IP-based LSI design is carried out hierarchically in the order of system level design S11, architecture design S12, functional design S13, logic design S14 and layout design S15. In the system level design S11, the architecture design S12 and the functional design S13, which are the upstream processes, an IP database 1 is utilized, which stores so-called IPs used for the LSI design.

[0046] The IP database 1 stores system level IPs 11 having information of the system level, behavior IPs 12 having information of the architecture level and RTL IPs 13a or software IPs 13b having information of the functional level, each of which is associated with a corresponding IP. In the system level design S11, the system level IP 11 is reused. In the architecture design S12, the behavior IP 12 corresponding to the reused system level IP 11 is retrieved via an interface 15, whereas in the functional design S13...

second embodiment

[0061] When an applicable IP is selected by searching the IP database in IP-based LSI design, it is very rare that the selected IP can be used as is for the LSI to be newly designed. Actually, it seems that, in most cases, the selected IP is inappropriate because of specification problems, or even when it is applicable, revisions and verifications are required. This problem increases the design man-hours and hinders realization of the efficient LSI design.

[0062] With a so-called target-driven reuse and design method of allocating components in accordance with requirement specifications, this problems is inevitable. Therefore, the inventors of the present invention propose a so-called IP-DB-driven reuse and design method. This method classifies input data into structural elements for which the possibility is high that there are existing design assets (IPs), so that the existing IPs can be used efficiently.

[0063]FIG. 10 is a diagram showing a configuration of an IP-based LSI design ...

third embodiment

[0075]FIG. 16 is a diagram illustrating the configuration of an IP-based LSI design system according to the third embodiment of the present invention. In this embodiment, a low-power system LSI (with reduced power consumption) can be realized by utilizing IPs efficiently in the top-down design of the system LSI.

[0076] First, in the system level design, a function definition 91 according to a system level IP is obtained with respect to the LSI to be designed. Next, in an architecture generation step S31, design data 92 of the architecture level are generated from the function definition 91 according to the system level IP. Then, in an operation analysis step S32, operation analysis of the LSI to be designed is carried out using these design data 92 of the architecture level, a command 93 and an operation pattern definition 94 that defines the operation of the system LSI.

[0077]FIG. 17 is a diagram showing an example of the operation analysis results. In FIG. 17, it is necessary to s...

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Abstract

An IP database includes a system level IP used in system level design. IPs A and B in the system level IP are divided into processing algorithm description portions, input data structure definition portions and output data structure definition portions. When a communication channel is provided between the IPs communicating data in architecture or functional design, a conversion circuit generating means generates a data conversion circuit between the communication channel and each of the IPs with reference to the IP database.

Description

RELATED APPLICATION [0001] This application is a divisional of application Ser. No. 10 / 130,546 filed May 20, 2002, which is the U.S. National Phase under 35 U.S.C. § 371 of International Application No. PCT / JP00 / 07869 filed Nov. 8, 2000.TECHNICAL FIELD [0002] The present invention belongs to a technology relating to a so-called IP-based LSI design. BACKGROUND ART [0003] Conventionally, integrated circuit devices within electronic appliances have been manufactured by forming individual LSIs of different types, for example, memory and processor, on semiconductor chips and then mounting the chips on a base substrate such as a printed circuit board. [0004] Recently, however, there is a higher demand for miniaturized, lightweight, power-saving and low-cost integrated circuit devices used in electronic appliances, for the purpose of wider-ranging utilization of the electronic appliances. This trend is even more pronounced in the field of digital information household appliances. And in re...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F17/50H01L21/82
CPCG06F17/5045G06F30/30
Inventor OKAZAKI, KAORUMIZUNO, MASANOBUMURAOKA, MICHIAKI
Owner PANASONIC CORP
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