High-resolution digital pulse width modulator and method for generating a high-resolution pulse width modulated signal

Abstract

A high-resolution digital pulse width modulator having a digital pulse width modulator unit for receiving a clock signal and for receiving the first bit of a digital control signal to generate a pulse width of the clock A pulse width modulated first pulse width modulated intermediate signal of an integer multiple of the period also has a programmable signal delay path for use based on the second bit of the digital control signal by delaying the first intermediate signal by a programmable delay time for outputting at least one pulse width modulated intermediate signal, the signal delay time being synchronized with the clock signal, and having a logic circuit for The intermediate signals are logically combined and output to form a pulse width modulated signal.

Description

technical field [0001] The present invention relates to a high resolution digital pulse width modulator and also to a method of generating a high resolution pulse width modulated signal. Background technique [0002] A pulse width modulator is used to drive a DC power supply and provide an on time and an off time in a specific switching cycle, and pulse width modulation is by changing the ratio of the on time to the off time To be realized, when driving a DC power supply, an extended turn-on time will provide a larger arithmetic mean value for the output voltage and, therefore, provide a larger output current. In addition, the pulse width modulated signal system It can also be used for information transmission, or to form an engine controller in automotive technology. [0003] In a similar design, a pulse width modulated signal can be generated by comparing a triangular wave voltage at a fixed frequency with a variable DC control voltage if the control voltage is greater th...

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Problems solved by technology

[0010] However, the fixed design of the flip-flops, or delay stages, as well as the generation of the clock signal in the pulse width modulators themselves, makes it difficult to communicate with an external clock signal when there is exactly one system clock. In addition, the delay time of each delay stage, and thus the system clock, will depend on fluctuations in the supply voltage in the operating temperature, or on transistor parameters during production , which can lead to mixed frequency products in adjacent telecommunication circuit parts, for example, in mobile circuits used in a plurality of frequency bands (dual-band or triple-band circuits), and in addition, in demodulation After the change, these mixed frequency products will produce noise that interferes with the sound in the useful signal (for example, in a voice signal), and in the digital control loop, a low system clock rate will produce A larger phase rotation (phaserotation) of the transfer function of the control loop, and therefore, a smaller phase edge of the control loop, which reduces attenuation and may thus cause unwanted natural Oscillation, however, in circuit configurations based on known technology, high clock frequencies can only be achieved less favorably by hardware changes or new developments, therefore, a device for pulse width modulation is required, and the The device will operate in a stable manner at high and variable (external) clock frequencies

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