Image display device and image display panel

Abstract

An image display device and an image display panel having high accuracy of adjusting sampling timing of a video signal and being capable of preventing a constant wasteful power consumption, comprise a timing detection circuit for generating a timing detection signal changing from a first level to a second level every time a switch circuit connected to each data line shared by pixels in each column sends a video signal, and the timing detection circuit includes at an output terminal of a timing detection signal a means (for example, PMOS) for closing a current path on the first level side and a means (for example NMOS) for opening a current path on the second level side respectively in synchronization with a video signal sending operation of the switch circuit.

Description

technical field [0001] The present invention relates to an image display device and an image display panel in which a so-called dot timing clock driving system is applied to a driving circuit. Background technique [0002] figure 1 and figure 2 is a block diagram of a structural example of an image display panel to which a dot timing clock driving system is applied. [0003] like figure 1 and figure 2 As shown, the image display panels 1A and 1B include a pixel portion 2 arranged in a matrix with pixels, a vertical drive circuit (V.DRV) 3, a horizontal drive circuit (H.DRV) 4, and a precharge circuit (P.CHG) 5 , as various circuits connected to the pixel portion 2. [0004] The pixel section 2 uses, for example, a liquid crystal element as a display unit (pixel) of an image. Each liquid crystal element has a liquid crystal cell and a thin film transistor (TFT) which is turned on at the time of display to supply a video signal SP to one electrode (pixel electrode) of ...

AI Technical Summary

Problems solved by technology

The feedback IC 110 basically estimates the amount of deviation of the phase by using the potential difference between the power supply voltage Vdd and the ground potential GND (or a constant value close to it) as a reference, but in this case, the reference fluctuates up and down.

Therefore, the accuracy of the feedback control decreases and the timing of the clock is adjusted to a wrong value

[0019] As the number of horizontal pixels of the image display panel increases and the period of the sampling pulse becomes shorter, the decrease in the accuracy of the feedback control becomes significant

[0020] In addition, when the off-leakage of the TFT increases due to characteristic degradation, a current flows from the power supply voltage Vdd to the ground potential via the CMOS transmission gate 101 in an off state, and therefore, in the image display device or image The power loss in the display panel increases

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