Manufacturing method of semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device, and the method comprises the steps: forming a stacking structure on a first region of a semiconductor layer, and the stacking structure comprises a first gate dielectric layer and a sacrificial layer; forming a groove and an insulating layer in the groove in the first region and the second region of the semiconductor layer, wherein the first region and the second region of the semiconductor layer are connected or separated; a side wall which exposes at least part of the groove is formed in the second region; forming a protective layer on the side wall of the exposed groove; and performing wet etching on the sacrificial layer in the first region, and in the wet etching process, protecting the side wall of the groove by the protective layer. According to the manufacturing method, the protective layer is firstly formed on the exposed semiconductor layer, and then the wet etching process of removing the sacrificial layer is carried out, so that the semiconductor layer is protected from being damaged in the wet etching step.

Description

technical field [0001] The present disclosure relates to the field of semiconductor technology, and more particularly, to a method for manufacturing a semiconductor device. Background technique [0002] With the rapid development of VLSI, the integration level of semiconductor chips is getting higher and higher. In the manufacturing process of the semiconductor element, a number of complicated processes are required to form the desired semiconductor device. Metal-oxide-semiconductor transistor (MOSFET, Metal-Oxide-Semiconductor-Field-Effect Transistor) is an important basic component in integrated circuits, which is mainly composed of semiconductor layer, gate dielectric layer, gate conductor and source / drain doping district composition. Complementary Metal Oxide Semiconductor (CMOS, Complementary Metal Oxide Semiconductor) is widely used because it can include both N-channel and P-channel field effect transistors. [0003] However, when the semiconductor device includes ...

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Problems solved by technology

[0003] However, when the semiconductor device includes a planar gate and a trench gate structure, during the manufacturing process, the semiconductor layer in the trench gate region will come into contact with some etchant, resulting in changes in the morphology of the semiconductor layer, and then affect subsequent devices

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