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Method for quickly relocking DLL circuit

A circuit and fast technology, applied in the direction of electrical components, automatic power control, static memory, etc., can solve problems such as loss of instructions and data, loss of instructions, non-instructions, etc., to reduce loss of instructions and data, avoid transmission interruption, improve reliability effect

Pending Publication Date: 2022-01-07
浙江力积存储科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During this period of time, the DRAM chip cannot receive any instructions, and subsequent instructions will be lost
For a working DRAM chip, obviously resetting the DLL circuit cannot quickly re-lock the DLL circuit, and it is not an effective solution to overflow or underflow
The adverse effects of overflow or underflow caused by factors such as temperature changes limit the application of DRAM memory and integrated circuit devices with it in complex environments
[0005] Therefore, it is very necessary to study a method for quickly re-locking the DLL circuit, without resetting the DLL circuit, the DLL circuit can be restored to the normal locked state of the DLL circuit in a short time, and it is solved in the DRAM memory. The problem of a large amount of data loss, so as to further promote the in-depth development and wide application of semiconductor integrated circuit technology

Method used

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  • Method for quickly relocking DLL circuit
  • Method for quickly relocking DLL circuit
  • Method for quickly relocking DLL circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] Such as figure 2 As shown, the DLL circuit in the example of this embodiment includes a phase detection module phase detect, a control module control, a duty cycle adjustment module DCC, a delay chain module delay_line and a fixed delay module delay_replica. Among them, the communication connection of each part is the same as the conventional DLL way, and will not be expanded any more. After the phase comparison between the external clock clk and the initial feedback clock clk_fb by the phase detection module phase detect, the control module control makes a control strategy to control the duty ratio adjustment module DCC and the delay chain module delay_line. In the case of the example, the duty cycle adjustment module DCC adjusts the duty cycle of the external clock clk to 50% to obtain the internal clock. The external clock clk is delayed by the delay chain module delay_line to obtain the delayed clock clk_1, and clk_1 accumulates the system fixed delay through the ...

Embodiment 2

[0040] Such as Figure 11 As shown, Embodiment 2 provides an example of the method for quickly re-locking the DLL circuit when overflow occurs. In step S2, it is judged whether the current delay amount can continue to be changed to compensate for the phase difference, and whether there is an overflow is detected in real time. After comparing the phases of the external clock clk and the feedback clock clk_fb currently input to the DLL circuit, the control module control judges that it is necessary to issue a command to increase the delay, and at the same time, the detection unit judges that the current first branch A and the second branch B have used The most delay units participate in the delay chain. That is, it is judged that the current values ​​of i and j have respectively reached their maximum values. Then it is detected that an overflow has occurred in the DLL circuit at this time. Such as Figure 11 As shown, the current first clock clk_odd is already generated by t...

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PUM

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Abstract

The invention provides a method for quickly relocking a DLL circuit. The method comprises the following steps: setting the DLL circuit; detecting whether overflow or underflow exists in real time, correspondingly setting a control signal according to a detection result, and controlling the delay of an internal clock; according to the method provided by the invention, the loss of instructions and data can be greatly reduced, and the normal phase locking state can be recovered in time without resetting the DLL circuit; a clock with the minimum error can be provided for output data during overflow or underflow, rapid relocking is achieved, the data transmission accuracy is high, and the stability is good; the adverse effect of temperature change on clock processing is effectively solved; the working reliability of the DRAM is improved, and the deep application of an integrated circuit technology is further promoted.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, in particular to a method for quickly re-locking a DLL circuit. Background technique [0002] The dynamic random access memory DRAM and the external control chip CPU accurately complete the transmission of instructions and data through the clock. During the read operation, DRAM needs to provide an output clock dqs, which is mainly used to accurately distinguish each transmission cycle within one clock cycle (tCK), and facilitate the receiver to receive data accurately. When the phase difference between the output clock dqs and the external clock clk is large, the CPU will capture wrong instructions and data. Adjusting the DRAM output clock dqs, so that the phase alignment of the output clock dqs and the external clock clk is currently mainly realized through a delay locked loop DLL (Delay Locked Loop) circuit. The DLL circuit maintains phase alignment between the outpu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/081G11C11/4076
CPCH03L7/081G11C11/4076
Inventor 亚历山大上官朦朦
Owner 浙江力积存储科技有限公司
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