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Circuit netlist verification method, device and system and related equipment

A circuit netlist and verification method technology, applied in CAD circuit design, electrical digital data processing, computer-aided design, etc., can solve problems such as circuit design errors, and achieve the effect of avoiding circuit design errors

Pending Publication Date: 2021-12-07
HYGON INFORMATION TECH CO LTD
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  • Abstract
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  • Claims
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Problems solved by technology

[0003] However, the modified circuit design is very likely to have circuit design errors

Method used

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  • Circuit netlist verification method, device and system and related equipment
  • Circuit netlist verification method, device and system and related equipment
  • Circuit netlist verification method, device and system and related equipment

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Embodiment Construction

[0047] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0048] As mentioned in the background art, in the design process of an integrated circuit, the circuit design needs to undergo multiple different tests or verifications to ensure that the circuit design complies with corresponding rules. In these testing or verification processes, corresponding adjustments and modifications will be made to the circuit design based on different considerations. Therefore, in the actual design process, the circuit design will be adjusted and modified m...

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Abstract

The embodiment of the invention provides a circuit netlist verification method, device and system and related equipment, and the method comprises the steps: obtaining a circuit netlist of a design circuit, the circuit netlist comprises device units and connecting lines between the device units, and the connecting lines are marked with marking voltages; traversing the connecting lines in the circuit netlist, and classifying the connecting lines based on the operating voltages in the connecting lines; judging whether the marked voltage marked by the connecting line matches the category to which the connecting line belongs or not; if so, the circuit netlist passes verification, and avoiding circuit design errors possibly caused by marking voltage errors.

Description

technical field [0001] The embodiments of the present application relate to the field of chip technology, and in particular to a circuit netlist verification method, device, system and related equipment. Background technique [0002] In the design process of an integrated circuit, the circuit design needs to undergo multiple different tests or verifications to ensure that the circuit design complies with the corresponding rules. In these testing or verification processes, corresponding adjustments and modifications will be made to the circuit design based on different considerations. Therefore, in the actual design process, the circuit design will be adjusted and modified many times by various parties. [0003] However, circuit design errors are very likely to occur in the modified circuit design. Contents of the invention [0004] In view of this, the embodiments of the present application provide a circuit netlist verification method, device, system and related equipme...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/392G06F30/398
CPCG06F30/392G06F30/398G06F2115/12
Inventor 薛明达滕辉
Owner HYGON INFORMATION TECH CO LTD
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