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Wafer data detection method and system, storage medium and test parameter adjustment method

A technology for wafer testing and data detection, applied in the field of data processing, can solve the problems of low detection accuracy of wafer test data correlation, and achieve the goal of improving the accuracy of testing results, increasing the speed of testing, and improving speed and accuracy. Effect

Active Publication Date: 2021-07-09
CHANGXIN MEMORY TECH INC
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Problems solved by technology

[0004] The present invention provides a wafer data detection method and system, a storage medium, and a test parameter adjustment method to solve the problem of low accuracy of wafer test data correlation detection

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  • Wafer data detection method and system, storage medium and test parameter adjustment method
  • Wafer data detection method and system, storage medium and test parameter adjustment method

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Embodiment Construction

[0030] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art can understand that in each embodiment of the present invention, many technical details are provided for readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in this application can also be realized.

[0031] The first embodiment of the present invention provides a wafer data detection method, including: acquiring the first wafer test data and the second wafer test data to be detected in the database; according to the first wafer test data and the second wafer test data Wafer position information of each chip in the data, partition the first wafer test da...

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Abstract

The embodiment of the invention provides a wafer data detection method and system, a storage medium and a test parameter adjustment method. The wafer data detection method comprises the steps of obtaining to-be-detected first wafer test data and to-be-detected second wafer test data in a database, and partitioning the first wafer test data and the second wafer test data according to wafer position information of each chip in the first wafer test data and the second wafer test data, generating a plurality of first wafer partition test data and a plurality of second wafer partition test data; and detecting the correlation between the first wafer partition test data and the second wafer partition test data belonging to the same partition. According to the invention, the test area of the wafer is partitioned, and the correlation between the first wafer test data and the second wafer test data of the partition is detected, so that the correlation of the whole wafer test data is evaluated, and the accuracy of the correlation detection result of the wafer test data can be improved.

Description

technical field [0001] The invention relates to the field of data processing, in particular to a wafer data detection method and system, a storage medium and a test parameter adjustment method. Background technique [0002] After the wafer production is completed, an electrical test is required and a large amount of wafer test data is generated. In actual analysis, it is necessary to analyze the correlation of wafer test data obtained by different electrical tests, so as to find out the correlation between different test items. In actual mass production, the amount of these data is huge, and there will be thousands of test items included in it, and each test item will have millions of data. In the traditional method, such a huge amount of data cannot be processed, and the corresponding sample data can only be extracted by sampling, and the correlation algorithm is used to detect the correlation between the two sets of data. [0003] The inventor found the following problem...

Claims

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Application Information

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IPC IPC(8): G01R31/28G06K9/62
CPCG01R31/2851G06F18/23213G06F18/23
Inventor 王世生
Owner CHANGXIN MEMORY TECH INC
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