Anti-fuse trimming circuit and trimming method thereof
A technology for trimming and adjusting circuits and anti-fuse, which is applied in the direction of logic circuits, electrical components, pulse technology, etc., and can solve the problems of low precision of electrical parameters, poor compatibility, long trimming time, etc.
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[0032] The present invention will be described in further detail below in conjunction with accompanying drawing:
[0033] figure 2 A first embodiment of the invention is shown.
[0034] see figure 1 as shown, figure 2 Shown in is only one of the anti-fuse and its trimming circuit, that is, the i (i=1,2,3,...,n) bit, figure 2 VDD is the power supply voltage, and the bias voltage VB is given to the PMOS field effect transistor PM 1 Provide suitable bias when PM 1 When the drain voltage is low enough, they form a constant current source circuit. The current Ic of the constant current source is designed to be very small, such as 100nA, to reduce power consumption. PD is PM 1 The parasitic body diode; diode D 1 and D 2 It is a P-type general-purpose diode located in different N-wells, which form an isolated current-limiting circuit; the anti-fuse is composed of a PMOS field effect transistor PM 2 constitutes, connected to the trimming input pin T i Between and ground; b...
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