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Foreground time error correction circuit of multi-channel time domain interleaved data converter

A technology for interleaving data and correcting circuits, applied in analog/digital conversion calibration/testing, analog/digital conversion, code conversion, etc. performance degradation and other issues, to achieve the effect of reducing stability requirements, reducing output data rate, and reducing the probability of enabling

Active Publication Date: 2021-03-26
BEIJING MXTRONICS CORP +1
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

These mismatch errors will cause serious damage to the overall performance of the converter. If these mismatches are not corrected, the accuracy of the converter will hardly meet the expected requirements. Among them, the correction of the first two errors is relatively easy, and there are relatively mature As the sampling rate increases, the influence of the time mismatch error on the performance of the converter increases exponentially, and it is difficult to correct, so it has become the focus of research in industry and academia

Method used

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  • Foreground time error correction circuit of multi-channel time domain interleaved data converter
  • Foreground time error correction circuit of multi-channel time domain interleaved data converter
  • Foreground time error correction circuit of multi-channel time domain interleaved data converter

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Embodiment

[0090] The present invention aims at the difficulty of correcting the channel time error of the ultra-high-speed time-domain interleaving data converter with more than 10 channels, and provides a front-end error automatic correction circuit to compensate the channel time error generated by the converter during the process of tape-out and actual use. Matching, reducing error and spurious signal components, improving parameters such as spurious-free dynamic range and signal-to-noise ratio, and improving the overall performance of the data converter.

[0091] The overall block diagram of the circuit of the present invention is as figure 1 shown. The circuit includes a down-sampling channel data extraction circuit, a zero-crossing detection circuit, a pre-normalization circuit, a negative feedback integration circuit, a convergence detection circuit, and a first-order Taylor expansion correction circuit. Because the clock distribution in the ultra-high-speed multi-channel time-do...

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Abstract

The invention discloses a foreground time error correction circuit of a multi-channel time domain interleaved data converter, which is characterized in that a down-sampling channel data extraction circuit can reduce a signal transmission rate to a channel sampling rate, extracts data and uses a zero crossing point detection circuit to determine whether zero crossing points exist between every twoadjacent channel conversion data or not; a pre-normalization circuit can remove a non-difference part between channels and leave difference information between the channels as time error information between the channels; error information is converged to a channel time error value through an accumulator and a step length adjusting circuit, and then an original conversion signal containing a channel time error is corrected through a Taylor first-order expansion correction circuit. A mean square error detection circuit is added in the structure to determine whether the circuit is converged to reliable precision or not. According to the method, a zero-crossing point statistical technology is used, step length parameters can be adjusted according to actual conditions, convergence time and convergence precision are balanced, the flexibility of a correction system is improved, and channel time error correction of the multi-channel time domain interleaved converter is achieved.

Description

technical field [0001] The invention relates to a foreground time error correction circuit for a multi-channel time-domain interleaving data converter, belonging to the technical field of integrated circuit ultra-high-speed data converters. Background technique [0002] Ultra-high-speed data converters play a vital role in high-performance signal processing systems such as radars, oscilloscopes, and wireless communications. Especially with the advent of the 5G era and the popularization of artificial intelligence, the demand for ultra-high-speed signal processing systems is more urgent. [0003] Traditional data converters are limited by the trade-off between power consumption and speed, as well as the limitation of device manufacturing process, so it is difficult to effectively increase the conversion rate of data converters within the acceptable range of other performance parameters. With the increase of converter application flexibility, more stringent requirements are p...

Claims

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Application Information

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IPC IPC(8): H03M1/10
CPCH03M1/1009
Inventor 李泽张铁良杨松杨龙薛培帆赵进才李熙泽霍淼王川中
Owner BEIJING MXTRONICS CORP
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