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In-memory computing device of double-6T SRAM structure

A computing device, dual-channel technology, applied in information storage, static memory, digital memory information and other directions, can solve the problems of large amount of intermediate data, increased energy consumption, and easy to generate errors.

Active Publication Date: 2020-10-23
中科南京智能技术研究院
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The CIM (In-Memory Computing) mode in traditional memory uses the behavior of accessing the original data row by row. The amount of intermediate data generated is too large, which is prone to errors, and the behavior of row-by-row access will also greatly increase energy consumption. This is in line with the increasing Low power requirements do not meet
There are still problems of area and power consumption in traditional memory. The area is large and the power consumption is high, which does not meet the current needs.

Method used

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Embodiment Construction

[0022] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0023] The purpose of the present invention is to provide an in-memory computing device with a dual-6T SRAM structure, which can reduce the generation of intermediate data and reduce power consumption.

[0024] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0025] Th...

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Abstract

The invention relates to an in-memory computing device of a double-6T SRAM structure. The device comprises an odd-even dual-channel array, a T6T SRAM unit array, a global-local reference voltage generation module, a two-bit complement processing module and an output combiner; the odd-even dual-channel array is used for inputting input data into the T6T SRAM unit array by utilizing odd channels andeven channels respectively; the T6T SRAM unit array is used for storing and calculating the input data; the T6T SRAM unit array is connected with the global-local reference voltage generation module;the global-local reference voltage generation module is connected with the two-bit complement processing module; the two-bit complement processing module is used for performing complement operation on data calculated by the T6T SRAM unit array; the output combiner is connected with the two-bit complement processing module; and the output combiner is used for accumulating and combining the data which has been subjected to complement operation to obtain final output data. With the in-memory computing device adopted, the generation of intermediate data can be reduced, and power consumption is reduced.

Description

technical field [0001] The invention relates to the field of computer memory, in particular to an in-memory computing device with a dual-6T SRAM structure. Background technique [0002] The application of deep neural networks in artificial intelligence and other fields has made breakthrough progress. Energy consumption and delay are mainly caused by the movement of input and weight values ​​between memory and computing units, and low power consumption is crucial for DNN processors. important. [0003] The CIM (In-Memory Computing) mode in traditional memory uses the behavior of accessing the original data row by row. The amount of intermediate data generated is too large, which is prone to errors, and the behavior of row-by-row access will also greatly increase energy consumption. This is in line with the increasing Low power requirements do not match. There are still problems of area and power consumption in the traditional memory. The area is large and the power consumpt...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/41G11C11/413
CPCG11C11/41G11C11/413Y02D10/00
Inventor 乔树山陶皓尚德龙周玉梅
Owner 中科南京智能技术研究院
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