P-type MOSFET and manufacturing method thereof

Abstract

The invention discloses a P-type MOSFET. A channel region is composed of an N well covered by a gate structure, the N well comprises a superposition region composed of first to fourth injection regions, and the superposition region is subjected to annealing treatment; the injection impurities of the first to fourth injection regions are respectively phosphorus, germanium, xenon and arsenic, and the junction depths are sequentially reduced, wherein the doping concentration of the fourth injection region is used for adjusting the threshold voltage, the ion injection process of the fourth injection region is carried out after the ion injection process of the second injection region and the ion injection process of the third injection region are completed, and the second injection region and the third injection region form an amorphous layer in the semiconductor substrate to enable arsenic injection in the fourth injection region to be uniform, wherein the germanium impurities in the second injection region are used for providing pressure stress for the channel region; and the xenon impurities in the third injection region are used for preventing the germanium impurities from diffusinginto the fourth injection region so as to reduce defects caused by germanium diffusion. The invention further discloses a manufacturing method of the P-type MOSFET. According to the invention, the local fluctuation of the threshold voltage can be reduced, the channel carrier mobility can be improved, and the device performance and the product yield can be improved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a P-type MOSFET. The invention also relates to a manufacturing method of the P-type MOSFET. Background technique [0002] The P-type MOSFET, that is, the PMOS, is usually formed in an N-type deep well (Deep Nwell layer, DNW), and the channel region is formed by using the N well. The ion implantation process of the N-type deep well is generally placed before the ion implantation process of the N well. The implantation energy of the ion implantation process of the N-type deep well is large, and the implantation depth is deep. Before the ion implantation of the N-type deep well, it is usually necessary to form a pad oxide layer on the surface of a semiconductor substrate such as a silicon substrate, and the ion implantation of the N-type deep well will pass through the pad oxide layer. [0003] However, after the ion implantation process of the N-type...

AI Technical Summary

Problems solved by technology

In the prior art, the N well is usually implemented by implanting a layer of phosphorus ions, and the depth of phosphorus ion implantation fluctuates greatly, which greatly affects the threshold voltage of the device.

At the same time, in order to improve the performance of the device, it is often necessary to improve the mobility of the carrier of the device, that is, the hole; in the prior art, it is impossible to directly improve the mobility of the hole through the doping structure of the N well.

Images