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Normally-equipped integrated unit diode chip

An integrated unit and diode technology, applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of LED light efficiency, heat dissipation and stability limitations, and achieve improved light extraction efficiency, large heat dissipation area, and high photoelectric conversion efficiency. Effect

Active Publication Date: 2020-04-21
纳微朗科技(深圳)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, LED light efficiency, heat dissipation and stability under high current will be severely limited

Method used

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  • Normally-equipped integrated unit diode chip
  • Normally-equipped integrated unit diode chip
  • Normally-equipped integrated unit diode chip

Examples

Experimental program
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Effect test

Embodiment 1

[0037] This embodiment provides a 6V high-voltage integrated unit light-emitting diode chip design, such as Figure 12-13 As shown, every two chip units are connected in series with each other to form a 6V high-voltage chip unit, and each 6V high-voltage chip unit is connected in parallel with each other. At this time, the ratio of series-parallel connection is 1:1. The units are connected in series with each other, and then connected in parallel with other N chip units. At this time, the ratio of series-parallel connection is 1:N. The circuit diagram is as follows Figure 12 shown.

[0038] Such as Figure 13As shown, the 6V high-voltage chip units are insulated from each other, and the n-type gallium nitride (n-GaN) platform 7 is exposed for each unit, and the left chip is connected in series through the bridge metal in the middle. The n-electrode and the p-electrode of the chip on the right. The 6V chip units are connected in parallel with each other, so even if a certai...

Embodiment 2

[0042] This embodiment provides a formal integration design method, image 3 It is a schematic circuit diagram of the unit diode chip series structure of the present invention.

[0043]

[0044] where R 0 , R 1 , R 2 , R 3 , R 4 ... is the resistance from the P-type electrode electrode line between a plurality of unit diode chips to the quantum well active region; R' 0 , R' 1 , R' 2 , R' 3 , R' 4 ...is the resistance from the N-type electrode electrode line between the multiple unit diode chips to the active region of the quantum well. Usually in the Nth unit diode chip, R N =R NM +R Nc +R Np-GaN , where R NM is the electrode wire resistance of the P-type electrode, R Nc is the contact resistance of a p-type ohmic contact, R Np-GaN is the resistance of p-GaN material; similarly, in the Nth unit diode chip, R′ N =R' NM +R' Nc +R' Nn-GaN , where R' NM is the electrode wire resistance of N-type electrode, R' Nc is the contact resistance of n-type ohmic co...

Embodiment 3

[0053] This embodiment provides a positively mounted integrated unit diode chip, the mesa structure area of ​​which is determined according to the current, such as Figure 5 to Figure 7 As shown, it includes N-type electrode 1 , P-type electrode 2 , ITO 3 , hole 11 , N-type electrode line 12 , and P-type electrode line 13 .

[0054] In the unit diode chip, the length of the diode unit row is fixed as L, and the diode units from the P-type electrode to the right are defined in sequence, and their widths are defined as L 0 , L 1 , L 2 , L 3 ,... L N …L M ; where the width of the diode unit satisfies L 0 >L 1 >L 2 >L 3 >…>L N ...> L M , the optimal design approximation is:

[0055]

[0056] According to L N And the area calculation formula to calculate the area of ​​the mesa structure.

[0057] In this embodiment, the front sectional view of the hole structure is added as Figure 5 As shown, the pore structure includes a plurality of pore units, the number of por...

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Abstract

The invention relates to the field of semiconductor materials and device processes, and especially relates to a semiconductor photoelectric device. The invention provides a normally-equipped integrated unit diode chip. The chip comprises a plurality of diode units, N-type electrode line type electrode wires and P-type electrode line type electrode wires, wherein areas of the diode units are gradually reduced from one side where the P-type electrode line type electrode wires are gathered to the other side. A technical problem that a diode structure in the prior art has great limitations in three important parameters of luminous efficiency, lumen density output and lumen cost is solved, the lumen output of a unit area unit diode chip is improved, and the lumen cost is reduced.

Description

technical field [0001] This application relates to the field of semiconductor materials and device technology, in particular to semiconductor optoelectronic devices. Background technique [0002] Conventional front-mounted integrated unit diode chips have uneven current diffusion, resulting in loss of luminous efficiency. The heat dissipation of the diode unit diode chip under the existing structure is realized through the sapphire substrate, and the heat dissipation is poor, thus affecting the efficiency and stability of the unit diode chip. Therefore, the main application field of front-mounted light-emitting diode unit diode chips is the small and medium power unit diode chip market below 0.5 watts, and it is impossible to provide products with high lumen output per unit area. Uneven current diffusion, uneven thermal diffusion, and uneven light extraction lead to great limitations in three important parameters: lumen efficiency, lumen density output, and lumen cost. Curre...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/075H01L33/06H01L33/32H01L33/62
CPCH01L25/0753H01L33/06H01L33/325H01L33/62
Inventor 蒋振宇闫春辉
Owner 纳微朗科技(深圳)有限公司
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