Radiation-proof reinforced circuit for a CMOS standard unit
An anti-radiation hardening, standard cell technology, applied in logic circuits, electrical components, reliability improvement and modification, etc., can solve problems such as permanent device damage, semiconductor device flipping, device gate oxide breakdown, etc., and achieve a small area overhead , the effect of improving the ability to resist single-event flipping
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[0019] In order to make the technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0020] figure 1 It is a schematic diagram for explaining the CMOS standard cell reinforcement circuit of the present invention, including PUN network, PDN network, p-type channel field effect transistor P1, p-type channel field effect transistor P2, n-type channel field effect transistor N1, n-type channel field effect transistor Transistor N2.
[0021] figure 2 It is a reinforced two-input NAND gate, the gate of P1 tube is connected to low level, the source of P1 is connected to PUN network, the drain of P1 tube is connected to the output port; the gate of N1 tube is connected to high level, and the drain of N1 tube is connected to the output port. The port is connected, and the source of the N1 tube is connected to the PDN ...
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