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RISC-V branch prediction method and device, electronic equipment and storage medium

A RISC-V and branch prediction technology, applied in machine execution devices, program control design, electrical digital data processing, etc., can solve problems such as waste of computing resources, reduction of processor instruction processing efficiency, and consumption of additional instruction cycles

Active Publication Date: 2019-08-16
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

That is to say, the existing BHT method cannot judge whether the jump command has completed the preset number of jumps, and it must wait until the next jump error that exceeds the preset number of jumps can be passively discovered, resulting in unnecessary computing resources The waste and consumption of additional instruction cycles reduce the instruction processing efficiency of the processor

Method used

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  • RISC-V branch prediction method and device, electronic equipment and storage medium
  • RISC-V branch prediction method and device, electronic equipment and storage medium
  • RISC-V branch prediction method and device, electronic equipment and storage medium

Examples

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Embodiment 1

[0047] See figure 1 , figure 1 A flow chart of a RISC-V branch prediction method provided in the embodiment of the present application, which includes the following steps:

[0048]S101: Obtain the remaining number of jumps of the target jump instruction;

[0049] This step aims to obtain the remaining number of jumps of the target jump instruction, that is, this step is based on the fact that a branch instruction has been confirmed as a jump instruction. As the name implies, the number of remaining jumps is a parameter used to indicate how many times the target jump instruction still needs to jump.

[0050] Wherein, the target jump instruction is provided by the RISC-V processor, specifically, provided by the PC register in the RISC-V processor; the remaining number of jumps can be recorded from certain bit fields of the target jump instruction There is a register address of the remaining number of jumps, and the remaining number of jumps is obtained from the register by ac...

Embodiment 2

[0064] See figure 2 , figure 2 It is a flowchart of a method for determining whether the next jump to be executed is the last jump in the RISC-V branch prediction method provided by the embodiment of the present application. For S103, this embodiment provides a The difference between the number of turns and the step length of a single jump is used to determine whether the jump to be performed by the target jump instruction is the last time the next jump needs to be performed, including the following steps:

[0065] S201: According to the remaining number of jumps respectively corresponding to two consecutive jumps of the target jump instruction, calculate and obtain a single jump step;

[0066] This step is the same as S102. For the corresponding description, please refer to S102, and the same parts will not be described again.

[0067] S202: Determine whether the difference between the remaining number of jumps and the step length of a single jump is 0, if it is 0, execut...

Embodiment 3

[0079] see below image 3 , image 3 A structural block diagram of a RISC-V branch prediction device provided in the embodiment of the present application, the device may include:

[0080] The remaining number of jumps acquisition unit 100 is used to acquire the remaining number of jumps of the target jump instruction;

[0081] The single jump step calculation unit 200 is used to calculate the single jump step according to the remaining number of jumps respectively corresponding to two consecutive jumps of the target jump instruction;

[0082] The last jump judging unit 300 is used to determine whether the jump to be performed by the target jump instruction is the last jump according to the single jump step size and the remaining number of jumps;

[0083] The last jump processing unit 400 is configured to perform the last jump on the target jump instruction when it is determined that the jump to be performed by the target jump instruction is the last jump;

[0084] The non-...

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Abstract

The invention discloses a RISC (Radio Service Station)-V branch prediction method. On the basis of the prior art, the remaining number of jumps of the jump instruction is additionally obtained; according to the difference value of the remaining jumping times during continuous two-time jumping, a single-time jumping step length (the single-time jumping step length is not fixed as 1) is obtained through calculation; therefore, whether the target jump instruction executes the last jump or not can be judged according to the single jump step of the jump instruction in combination with the real-timeresidual jump times, so that whether the subsequent jump times still need to be executed or not can be determined according to the judgment result. By means of the scheme, whether the jump instruction currently jumps to the last time or not can be actively judged, compared with the prior art that the same result is passively obtained, extra computing resources and instruction periods do not needto be consumed, and the processing efficiency of the processed instruction is higher. The invention further discloses the RISC-V-branch prediction device, electronic equipment and a computer readablestorage medium, which have the above beneficial effects.

Description

technical field [0001] The present application relates to the technical field of RISC-V processors, in particular to a RISC-V branch prediction method, device, electronic equipment, and computer-readable storage medium. Background technique [0002] With the complexity of the computer system, it is required that the structure of the computer instruction system can make the overall performance of the computer faster and more stable. Initially, the optimization method adopted by people is to set some complex function instructions, and some commonly used functions originally realized by software are replaced by hardware instruction system, so as to improve the execution speed of the computer. This kind of computer system is called It is called complex instruction system computer (CISC, Complex Instruction Set Computer). [0003] However, with the development of computer technology, many defects were found in the direction of CISC. Therefore, RISC (Reduced Instruction Set Compu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F9/30
CPCG06F9/3804G06F9/30069G06F9/3806G06F9/3844G06F9/30058G06F9/30065G06F9/325
Inventor 刘同强王朝辉李仁刚李拓周玉龙邹晓峰
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD
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