A three-dimensional flash memory array unit operation method with variable programming stages

Abstract

The invention discloses an operation method of a three-dimensional flash memory array unit with variable programming stages. The operation method comprises the following steps: S1, receiving an erasing operation instruction and address information; S2, erasing the selected block structure; S3, receiving a multi-level programming instruction and address information; S4, judging whether the addressoverflows or not, if yes, entering S5, otherwise, receiving programming level information of the target unit, and entering S6; S5, completing the programming operation of the selected block structure,and ending; S6, performing multi-level programming operation on the current flash memory unit according to the multi-level programming instruction, the address information and the programming level information of the target unit; S7, judging whether the difference of the threshold voltages is not smaller than the preset minimum interval voltage or not, if yes, changing the address information, entering S3, and performing the programming operation of the next flash memory unit; And otherwise, carrying out multi-level programming operation on the current flash memory unit for no more than the preset number of times again. The flash memory unit is subjected to target stage number programming, the threshold voltage of the flash memory unit is accurate to the preset value, and therefore the data state of the flash memory unit is accurately controlled.

Description

technical field [0001] The invention belongs to the technical field of semiconductor storage, and more specifically relates to a method for operating a three-dimensional flash memory array unit with variable programming levels. Background technique [0002] Flash memory (Flash), as a non-volatile memory, can be divided into NAND flash memory and NOR flash memory. Each memory cell of NOR flash memory is independently connected to the bit line and word line, so it has good random storage characteristics, and multiple memory cells of NAND flash memory are connected in series, so it has good integration characteristics and is often used in high-density flash memory arrays realization. As the feature size decreases, the flash memory array with planar structure will face problems such as increased crosstalk between adjacent cells and too few electrons stored in the floating gate. In order to continue to increase storage density, three-dimensional vertically stacked flash memory ...

AI Technical Summary

Problems solved by technology

[0003] The three-dimensional vertical NAND storage string was first disclosed in 2001, however, each cell of this NAND storage string can only store one bit of data

However, the patent does not describe the implementation method of multi-value storage

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