A clock signal generating apparatus and method

Abstract

The invention relates to a clock signal generating device and method. The frequency of a signal to be output is obtained by a key input module. The FPGA field programmable gate array generates a frequency control code according to the frequency of the signal. The frequency control code is sent to the DDS frequency synthesizer through FPGA, and the frequency control code is loaded and stored in thefrequency control register in serial or parallel mode. A phase accumulator generates a phase value by accumulating the phase of the frequency control code in each clock cycle. A digital sine wave clock signal is generated by calculating the amplitude of the sine wave from the phase value by a sinusoidal calculator. The digitized sine wave clock signal is converted into analog signal by D / A converter, and the analog signal is low-pass filtered by low-pass filter, and the low-pass filtered analog signal is output through SMA interface. The method supports the generation of clock signal with arbitrary frequency in the range of 35MHz -4GHz, is flexible and suitable for testing, measuring or calibrating in the harsh environment in the field.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of clock signal processing, and in particular to a clock signal generation device and method. Background technique [0002] The clock signal is the basis of sequential logic. It is used to determine when the state in the logic unit is updated. It is a semaphore with a fixed period and has nothing to do with operation. A clock signal has a fixed clock frequency, which is the reciprocal of the clock period. In synchronous digital circuits in electronics and especially signals, a clock signal is a special signal that oscillates between a high and a low state. The signal utilizes a digital circuit that acts like a metronome in coordination. A digital clock signal is basically a square Wave voltage, only two levels, one is low level, the other is high level. The high level can be different according to the requirements of the circuit, for example the high level of TTL standard is 5V. [0...

AI Technical Summary

Problems solved by technology

At present, most clock signal sources on the market have problems such as large size, inconvenient portability, need for external power supply, high cost, etc., making it inconvenient for users to test, measure or calibrate in harsh outdoor environments

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