Aneural network acceleration system based on a block cyclic sparse matrix

Abstract

The invention relates to a neural network acceleration system based on a block cyclic sparse matrix, and the system comprises an extensible processing unit array which stores a part of weights of a neural network, and carries out the decoding and operation of a compressed network; The main controller is mainly responsible for controlling the operation process; And the excitation distribution unitis used for distributing non-zero operation data to the extensible processing unit array under the control of the main controller. The method has the beneficial effects that the characteristics of a block cyclic sparse matrix are effectively utilized, the problem of unbalanced load of sparse matrix vector multiplication operation is solved, and the utilization rate of operation units is improved;By utilizing the sparsity of excitation and weight, the use of on-chip storage is reduced, and redundant operation is skipped, so that the throughput of a hardware accelerator is improved, and the real-time requirement for processing a deep neural network is met.

Description

technical field [0001] The invention relates to the field of neural network hardware acceleration, in particular to a neural network acceleration system based on block cyclic sparse matrix. Background technique [0002] Deep neural network has received extensive attention from academia and industry due to its current optimal results in artificial intelligence applications such as image recognition. The scale of deep neural networks is getting larger and larger, and large-scale networks have the characteristics of high computational complexity and a large number of operational parameters. At the same time, due to the limitations of traditional processor performance and energy efficiency, it is difficult to implement large-scale convolutional neural networks on embedded or terminal devices. In resource-constrained systems such as embedded systems, the energy efficiency of the processor is critical. Therefore, under the premise of maintaining the recognition accuracy of the d...

AI Technical Summary

Problems solved by technology

The accelerator structure based on sparse neural network has the problem of unbalanced load due to irregular operations

While the acceleration architecture based on the block circulant matrix has a regular structure but cannot effectively utilize the incentive and weight sparsity

Images