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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of reducing the effective work function of the device, diffusion of aluminum atoms, affecting the performance and reliability of the device, etc., so as to improve the performance and reliability. The effect of the effective work function

Inactive Publication Date: 2019-03-05
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the existing high-k dielectric layer / metal gate last process, the material of the metal gate is usually aluminum, so aluminum atoms are prone to diffuse, and aluminum atoms diffuse to the work function metal layer or even the high-k dielectric layer , which reduces the effective work function (eWF) of the device, thereby affecting the performance and reliability of the device. Therefore, preventing the atomic diffusion of the metal gate is the key to improving the performance of semiconductor devices

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0030] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0031] It should be understood that the invention can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

[0032] It should be understood that when an element or layer is referred...

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Abstract

The present invention provides a semiconductor device and a manufacturing method thereof. The method comprises: providing a semiconductor substrate; forming a high-k dielectric layer on the semiconductor substrate; forming a cap layer or a work function metal layer on the high-k dielectric layer; performing ion implantation on the cap layer or the work function metal layer; and forming a metal gate on the cap layer or the work function metal layer. According to the semiconductor device manufacturing method provided by the present invention, ion implantation is performed after forming a cap layer or a work function metal layer, and diffusion of metal atoms in a subsequently formed metal gate is avoided, so that an effective work function of the semiconductor device is improved, and the performance and reliability of the semiconductor device are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] The main device in integrated circuits (ICs), especially VLSIs, is metal-oxide-semiconductor field-effect transistors (MOSs). High performance and more functional integrated circuits require greater component density, and the size, size, and space of individual components, between components, or by themselves need to be further reduced. [0003] For CMOS with more advanced technology nodes, high-k last / metal gate last (high-k and metal gate last) technology has been widely used in CMOS devices to avoid damage to devices by high-temperature processing processes. In current high-k / metal gate-last technology, the formation of interfacial layer (IL) and high-k (HK) dielectric layer is followed by deposition of work function metal layer (WF) and metal Grid (MG). [0004] However, in the ...

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Application Information

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IPC IPC(8): H01L21/28H01L29/423
CPCH01L29/401H01L29/42356
Inventor 涂火金
Owner SEMICON MFG INT (SHANGHAI) CORP
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