Design method for cathode short MOS-controlled thyristor layout
A layout design, thyristor technology, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of burnt devices, enhanced gate signal delay effect, heat accumulation, etc., to shorten the time difference of latch, uniform current distribution, reduce The effect of heat accumulation
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[0029] Taking a device with a cell width of 50 μm as an example, the withstand voltage is 1700V. Figure 4Schematic diagram of the topological circuit for the CS-MCT device under transient simulation. Among them, the device works in the RLC loop, the capacitance C is 0.72μF, the charge is 1100V, the inductance L A and L C Both are 20nH, R gex is 5Ω, the gate voltage is 10V, change R gin The value of the gate parasitic resistance at the time of failure is used as the benchmark for normalization processing, and the discharge situation of the CS-MCT device under the high current pulse is obtained. Taking this as an example, it is intuitively shown that the layout design of the present invention is different from the conventional CS-MCT device. The layout design of MCT has the performance advantage in this application field.
[0030] Compared Figure 5 with Image 6 In the figure, the distribution of the anode current in the internal cell and the edge cell during the pulse d...
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