PCM and DRAM-based hybrid memory system and management method thereof

Abstract

The invention discloses a PCM and DRAM-based hybrid memory system and a management method thereof. The hybrid memory system comprises an MB level small capacity DRAM as a cache, a GB level large capacity DRAM and GB level non-volatile phase change storage medium PCM as master memories. The management method comprises the steps of (10) small capacity DRAM cache: managing based on improved two-levelcache algorithms of LRU and LFU-Aging; (20) large capacity DRAM as master memory: managing a write oriented data page by using an LRU replacement algorithm; and (30) the phase change storage medium PC as master memory: managing a read oriented data page by using an inter-group abrasion balance method and an LRU replacement algorithm. The hybrid memory system and management method have advantagesof high performance and low energy consumption of the hybrid memory I / O, and write load balance and long service life of PCM.

Description

technical field [0001] The invention belongs to the technical field of computer architecture and memory management, in particular to a hybrid memory system based on PCM and DRAM with good I / O performance, low energy consumption and long service life and a management method thereof. Background technique [0002] The rapid development of in-memory computing and the increasing number of processor cores brought about by big data have pushed the demand for memory speed, capacity, power consumption, and reliability to unprecedented new heights. During the past decades, DRAM has been widely used in mobile terminals and large-scale computing systems as a main main memory. With the increasing demand for high-performance memory with large capacity, low power consumption and strong scalability in current computer systems, existing DRAMs are faced with various technical challenges such as high static power consumption, capacity enhancement reaching the upper limit, and limited scalabili...

AI Technical Summary

Problems solved by technology

[0006] The second vertical architecture is figure 2 As shown, DRAM is used as the cache of PCM to cover up the lack of I / O performance and write endurance of PCM, but it cannot make full use of the DRAM memory space to store data, nor can it reduce the write operation of PCM

[0011] 1. The hybrid storage architecture based on PCM and DRAM cannot effectively balance the performance, space utilization and write endurance of hybrid memory;

[0012] 2. In the management of the hybrid storage architecture based on PCM and DRAM, due to the flaws in the wear leveling method, the non-volatile storage medium PCM has a high write load and a short service life, which affects the overall life and system reliability.

Images