High-K dielectric groove lateral double-diffused metal oxide element semiconductor field effect transistor and manufacturing method thereof

Abstract

The invention provides a high-K dielectric (HK) groove lateral double-diffused metal oxide element semiconductor field effect transistor (LDMOS) and a manufacturing method thereof. According to the device, a deep groove high dielectric constant dielectric layer is formed on the drain end, the lower end of the high-K dielectric groove layer goes deep into the epitaxial layer arranged on the substrate of the device and the upper end is connected with the drain electrode of the device. The HK dielectric groove and the element semiconductor material substrate form an MIS capacitor structure, and the charges of the substrate of the device can be auxiliarily exhausted when the device is turned off so that the LDMOS having the low resistance substrate is enabled to acquire high breakdown voltage.Besides, the electric field distribution in the device body can be effectively modulated by the uniform electric field of the HK dielectric groove in case of device reverse voltage withstanding so that the longitudinal high electric field of the drain end of the device can be reduced, the breakdown voltage of the device can be enhanced and the problem of saturation of the breakdown voltage of theLDMOS along with increasing of the length of the drift region can be solved.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, in particular to a lateral double-diffusion metal oxide element semiconductor field effect transistor and a manufacturing method thereof. Background technique [0002] With the rapid development of new power semiconductor devices represented by power MOSFET devices, power semiconductor devices are widely used in computer, lighting, consumer electronics, automotive electronics, industrial drives and other fields. Power semiconductor devices are the core of green, low power consumption, energy saving and environmental protection device. Lateral Double-diffused MOS (Lateral Double-diffused MOS, referred to as LDMOS) as a representative of the lateral power device with high withstand voltage and low on-resistance has the advantages of easy integration, good thermal stability, good frequency stability, low power consumption, The advantages of multi-element conduction, small power drive, and...

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Problems solved by technology

In the design optimization process of lateral power devices such as LDMOS, with the optimization of surface electric field terminal technology, including reduced surface electric field technology (Reduced Surface Field, referred to as RESURF), field plate (Field Plate, referred to as FP) technology, lateral variable doping ( With the application of technologies such as Variation of Lateral Doping (VLD for short), the surface electric field of lateral power devices has been optimized to a certain extent, but there are few technologies for optimizing the vertical electric field of devices.

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