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Semiconductor device with voltage-withstanding structure and manufacturing method thereof

A voltage-resistant structure and semiconductor technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as poor voltage resistance performance, achieve the effects of reducing production costs, utilizing device area, and ensuring voltage resistance performance

Active Publication Date: 2018-08-07
天津中科先进技术产业有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In view of this, the object of the present invention is to provide a semiconductor device with a voltage-resistant structure and a manufacturing method thereof, so as to alleviate the technical problem of poor voltage-resistant performance of the device structure in the prior art

Method used

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  • Semiconductor device with voltage-withstanding structure and manufacturing method thereof
  • Semiconductor device with voltage-withstanding structure and manufacturing method thereof
  • Semiconductor device with voltage-withstanding structure and manufacturing method thereof

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Embodiment 1

[0038] see figure 1, a cross-sectional view of a semiconductor device with a withstand voltage structure provided by an embodiment of the present invention. A semiconductor device with a voltage-resistant structure provided by an embodiment of the present invention includes: an N-type substrate 1, an N+ region 2, a P- body region 6, a voltage-resistant oxide layer 3, a polysilicon region 4, an N+ source region 5, a gate Extreme oxide layer 8, polysilicon gate 7, dielectric layer isolation 9, device source metal 10 and device drain metal 11. Wherein, the withstand voltage oxide layer and the polysilicon region constitute the withstand voltage structure of the semiconductor device. The N+ region is an electron drift region composed of a central region, a bottom region and a side region. The cross-section of the side area is "mouth", the cross-section of the central area is "one", located in the center of the side area, and the bottom area is square, located at the bottom of th...

Embodiment 2

[0048] A method for manufacturing a semiconductor device with a withstand voltage structure provided by an embodiment of the present invention includes the following steps:

[0049] Step S1: providing an N-type substrate, forming an N+ epitaxial layer on the upper surface of the N-type substrate, forming a P- epitaxial layer on the upper surface of the N+ epitaxial layer, and performing surface planarization after epitaxy. see image 3 , a product schematic diagram of step S1 in the method for manufacturing a semiconductor device with a voltage-resistant structure provided in an embodiment of the present invention.

[0050] Step S2: forming deep trenches on both sides of the P- epitaxial layer. see Figure 4 , a product schematic diagram of step S2 in the method for manufacturing a semiconductor device with a voltage-resistant structure provided in an embodiment of the present invention.

[0051] Step S3: forming a voltage-resistant oxide layer inside the deep trench, the v...

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Abstract

The invention, which relates to the technical field of the semiconductor chip, provides a semiconductor device with a voltage-withstanding structure and a manufacturing method thereof. The semiconductor device is composed of an N type substrate, an N+ region, a P-body region, voltage-withstanding oxide layers, polycrystalline silicon regions, an N+ source region, a gate oxide layer, a polycrystalline silicon grid electrode, a dielectric layer isolation part, a device source metal part, and a device drain metal part. The voltage-withstanding oxide layers being concave oxide layers are arrangedat the two sides of the central region of the N+ region and are in contact with the lateral regions of the N+ region; and the concave regions of the voltage-withstanding oxide layers are filled with the polycrystalline silicon regions. Therefore, a technical problem of poor voltage-withstanding performance of the existing device in the prior art is solved. The voltage-withstanding performance of the device is ensured; the saturation current of the semiconductor device is improved; the on-resistance of the device is reduced; the device area is utilized effectively; the production cost of the device is lowered; and the conduction performance of the semiconductor device is enhanced.

Description

technical field [0001] The invention relates to the technical field of semiconductor chips, in particular to a semiconductor device with a withstand voltage structure and a manufacturing method thereof. Background technique [0002] At present, the structure of MOS devices mainly includes source metal, dielectric layer isolation, polycrystalline gate, gate oxide layer, device P-type body region, device N+ source region, device N-type epitaxial layer, device N-type substrate and Device drain metal. In the process of realizing the present invention, the inventors found that there are at least the following problems in the prior art: the on-resistance of the MOS device is large, and when the device is turned on, electrons will start from the N-type source, pass through the channel, and the N-type epitaxial layer. N-type substrate, eventually reaching the drain. To increase the withstand voltage of the device, the N-type epitaxial layer must be very thick, and the thicker the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/0684H01L29/66477H01L29/78
Inventor 王振海
Owner 天津中科先进技术产业有限公司
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