Device and method for testing MIMO scheme system

Abstract

The invention provides a testing device for a system, and the device is small in circuit scale and uses little electricity. The system combines multi-carrier, a MIMO scheme, and beam forming processing. For modulation signals of each carrier of an R layer quantity output by a layer frequency domain signal generation unit (31), a window function arithmetic operation unit (32) performs convolution arithmetic operation of frequency characteristics of a window function. On another aspect, for a beam forming equivalence arithmetic operation unit (52) performs an arithmetic operation process equivalent to the beam forming process with the input of propagation channel characteristics of each path which are output by a fading setting unit (51), and a Fourier transform unit (53) performs Fourier transform with the input of the arithmetic operation results. An arithmetic operation unit (54) performs multiplication on two operation results Ht and Fsym, obtains spectrum information of signals to be received in receiving antennas, and converts the obtained spectrum information into signals in the time domain through inverse Fourier transform processes performed by a time domain signal generation unit. A shift addition unit (34) shifts and adds the converted signals, to generate received signals of the receiving antennas.

Description

Technical field [0001] The present invention relates to a technique for reducing the circuit scale of a test device that has a terminal corresponding to the MIMO (Multi Input Multi Output) method or a circuit substrate and integrated circuit built in the terminal as a test object, and The function of performing fading processing on the propagation path of N×M channels assumed between the transmitting antenna and the receiving antenna. In the MIMO method, the number of antennas on the base station side is N and the number of antennas on the terminal side is M. Downlink signal. Background technique [0002] MIMO methods such as Picture 9 As shown, the downlink signals Stx1 to StxN toward the terminal side are transmitted from N (N=4 in this example) base station side antennas (hereinafter referred to as transmitting antennas) Atx1 to AtxN, and M (the In the example, M=2) Terminal side antennas (hereinafter referred to as receiving antennas) Arx1 to ArxM perform reception. [0003] ...

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Problems solved by technology

[0027] In the test device with the above-mentioned structure, in a system that performs beamforming processing, the number N of arrayed transmitting antennas becomes very large, for example, 128, and the time required to perform parallel Fourier transform processing with N sequences 128 groups are required for the area signal generating unit 13, and the circuit scale becomes very large

[0028] In addition, the delay setting unit 21 of the propagation path simulator 20 needs a hardware configuration that provides an arbitrary delay by a combination of a memory and a resampling filter as described above. U paths give arbitrary delays, which still leads to a very large circuit scale, and the device is enlarged, and the manufacturing cost and power consumption are increased.

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