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Encryption and decryption method and encryption and decryption device based on AES (advanced encryption standard) algorithm

An encryption/decryption and algorithm technology, applied in the field of encryption/decryption method and encryption/decryption device based on AES algorithm, can solve the problems of inability to share hardware resources, large overhead area, and high power consumption, and achieve the effect of hardware sharing and resource reduction.

Inactive Publication Date: 2014-01-15
深圳市芯通信息科技有限公司
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  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention provides an encryption and decryption method based on the AES algorithm and an encryption and decryption device based on the AES algorithm, aiming to solve the problems in the prior art that some hardware resources cannot be shared, the overhead area is large, the circuit scale is large, and the power consumption is high. question

Method used

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  • Encryption and decryption method and encryption and decryption device based on AES (advanced encryption standard) algorithm
  • Encryption and decryption method and encryption and decryption device based on AES (advanced encryption standard) algorithm
  • Encryption and decryption method and encryption and decryption device based on AES (advanced encryption standard) algorithm

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Embodiment 1

[0043] see figure 1 , the flow chart of a preferred embodiment of the encryption and decryption method based on the AES algorithm of the present invention, the specific implementation process of the method is as follows:

[0044] Encryption process:

[0045] Step S100, preprocessing the input data to be encrypted, and performing round key addition with the initial key k[0] generated by the key expansion module, that is, a bitwise XOR operation;

[0046] Step S110, under the control of the encrypted signal, perform 10 rounds of encryption iterative operations on the data obtained in step S100;

[0047] The steps of a single encryption iteration operation include:

[0048] Step S111, performing S-box replacement on the input data;

[0049] Step S112, performing a row shift operation on the data passed through step S111;

[0050] Step S113, performing a column mixing operation on the data passed through step S112;

[0051] Step S114, generate the subkey of this round accor...

Embodiment 2

[0096] see figure 2 , corresponding to the above method, a preferred embodiment of an AES algorithm-based encryption and decryption device is provided, including:

[0097] Preprocessing module: This module is used to add round key to the data to be encrypted received by the input interface module IF and the initial key k[0], or to perform round key addition on the received data to be decrypted and the subkey k[10]. key plus;

[0098] Key expansion module (not shown): generate the subkeys required for encryption or decryption iterative operations; corresponding to figure 2 The middle key operation module provides the sub-keys required for operation;

[0099] Control module: generate an encryption signal or a decryption signal, which are used to control the corresponding encryption or decryption iterative operations on the data; and record the number of rounds of encryption iterations or decryption iterations; the control module is in figure 2 not shown, but it is controll...

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Abstract

The invention discloses an encryption and decryption method and an encryption and decryption device based on an AES (advanced encryption standard) algorithm. Decryption iteration comprises the following steps: b1, performing S-box inverse permutation on input data; b2, performing inverse row shift operation on the data processed by the S-box inverse permutation; b3, performing inverse column mixing operation on the data processed by the row shift operation; b4, according to subkeys in the last round, generating subkeys in the current round through reverse expansion, and performing inverse column mixing operation on the generated subkeys; b5, performing round key addition on the data obtained in the steps b3 and b4. Through the decryption iteration in the sequence, and hardware sharing of the encryption and decryption algorithm is further promoted, an operation circuit for encryption and decryption operations is more efficiently integrated into a hardware structure, the overhead area and the circuit scale are reduced, and the power consumption is lowered; the use of RAM is further omitted and hardware resources are further saved.

Description

[technical field] [0001] The invention relates to the field of AES algorithm encryption and decryption, in particular to an encryption and decryption method based on the AES algorithm and an encryption and decryption device. [Background technique] [0002] AES encryption algorithm (Advanced Encrypt Standard) is an advanced encryption standard in cryptography, formulated and published by the National Institute of Standards and Technology (NIST). Due to its security, stability and other advantages, it has become one of the most popular algorithms in symmetric key encryption and is widely used in various security fields. Its evolution scheme has also become the focus of people's analysis and research in the security field. topic. [0003] The implementation of encryption algorithms can be divided into software direction and hardware direction at a macro level. However, considering the security and speed defects of software implementation of encryption algorithms, people are mo...

Claims

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Application Information

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IPC IPC(8): H04L9/28H04L9/32
Inventor 金爽张献英陈飞
Owner 深圳市芯通信息科技有限公司
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