Address scrambling device and method for off-chip memory of on-chip system
An off-chip memory and system-on-chip technology, applied in the field of system-on-chip, can solve the problems of occupying CPU resources, reducing the performance of the system chip, reading and writing off-chip memory efficiency, difficult to defend against operating system vulnerabilities and software backdoors, etc., to achieve efficient and safe reading and writing. Effectiveness of Data, Assured Security and Confidentiality
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[0037] In order to make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be described clearly and completely in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is only a part of the embodiments of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
[0038] The embodiment of the present invention provides an off-chip memory address scrambling device of a system on chip, such as figure 1 As shown, the device includes: a true random number generator 11, a key memory 12, and an on-chip security controller 13 arranged in a system on chip. The on-chip security controller 13 is conn...
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