Detecting system and detecting method for safety testing mode

Abstract

The invention discloses a detecting system and a detecting method for a safety testing mode. The detecting system is used for preventing entering the safety testing mode after a chip testing circuit is abandoned. The detecting system for the safety testing mode comprises a time sequence logic control module, a detecting circuit module and a triggering module. The triggering module is used for generating a high-level or low-level triggering signal according to an on-off state. The time sequence logic control module outputs a high-level testing mode signal according to the low-level triggering signal, thereby making a chip enter the safety testing mode, or the time sequence logic control module outputs a low-level testing mode signal according to the high-level triggering signal, thereby making the detecting circuit module output a self-destroying signal for performing a self-destroying operation. Therefore the detecting system for the safety testing mode improves protecting effectiveness for chip sensitive information and accords with a majority of technological realizing requirements. The detecting system can be widely applied to various safety chips.

Description

technical field [0001] The invention relates to the field of information security of integrated circuits, in particular to a detection system and a detection method applied to a security test mode of a security chip. Background technique [0002] There will be some manufacturing defects in the chip production process, and chip testing is required to reflect the real situation of the chip and screen out problematic chips. The security chip also usually has a test circuit to ensure that the chip products delivered to the user can work correctly and reliably, so the test circuit is an essential part of the security chip. In order to improve the test efficiency and reduce the design complexity of the test circuit, the test circuit can generally access all resources inside the chip, and the security level of the test mode is very high. In order to effectively resist attackers using the test mode to steal key user data inside the security chip, tamper with the chip program, etc.,...

AI Technical Summary

Problems solved by technology

[0003] In the existing technology, a certain control signal or clock or reset signal is usually placed in the dicing slot as a chip fuse (Fuse), and after the security chip test is completed, it is cut by dicing, and the chip can no longer enter the test mode.

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