Non-volatile semiconductor memory device

Abstract

The invention provides a flash memory comprising a memory array comprising a memory mat MAT-0, MAT-1; a page buffer 170-0, holding data read from the memory mat MAT-0; a page buffer 170-1, holding data read from the memory mat MAT-1; an ECC circuit 140, performing data error checking and correction; an output buffer 110 for outputting data; and a transferring control element, controlling transferring of data between the page buffer 170-0, page buffer 170-1, ECC circuit 140 and output buffer 110. When the memory mat MAT-0 is selected, the transferring control element transfers data held by thepage buffer 170-0 to the page buffer 170-1 of the memory mat MAT-1.

Description

technical field [0001] The present invention relates to a kind of non-volatile semiconductor memory device, relate in particular to a kind of NAND flash memory (flash memory) equipped with chip level (onchip) error detection and correction (Error Checking Correction, ECC) function Read method. Background technique [0002] Currently on memory chips, redundancy schemes are used to apparently repair physical defects in memory elements generated during the manufacturing process. Furthermore, in addition to physical restoration by redundant memory, there is an error detection and correction circuit as a countermeasure against soft errors. [0003] In the NAND flash memory of Patent Document 1, the cache register is composed of two parts. While outputting data from one of the cache registers, an error correction code operation is performed on the data of the other cache register. The delay of error correction code operation is removed from the output, enabling high-speed readou...

AI Technical Summary

Problems solved by technology

[0014] The object of the present invention is to solve such problems and provide a nonvolatile semiconductor memory device equipped with a chip-level ECC function that can achieve miniaturization and high speed.

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