Automatic test platform of high-speed ADC chip and test method

Abstract

The invention discloses an automatic test platform of a high-speed ADC chip and a test method. The automatic test platform comprises an ADC daughter board, a test mother board, a FPGA core board, an upper computer, and a test device. The ADC daughter board comprises a device placing a tested ADC chip, an ADC chip basic working circuit and a lead-out chip interface connected with an ADC chip device. The basic working circuit ensures normal operation of the tested ADC chip. The lead-out chip interface leads out interfaces of the tested ADC chip and makes the interfaces connect with the test mother board through a high-speed interface, the interfaces of the tested ADC chip being required to measure. The test mother board is connected with the ADC daughter board and the FPGA core board. The FPGA core board is connected with the upper computer, and is used to complete tasks of program control and data processing. The upper computer communicates with the FPGA core board, and is used to control a test process. The test device comprises a signal source and a power supply, and provides signals and power required by the whole automatic test platform. The automatic test platform and the test method can rapidly test all performance indexes of high-speed ADC.

Description

technical field [0001] The invention belongs to the technical field of testing integrated circuit chips, and in particular relates to an automatic testing platform and a testing method applied to high-speed analog-to-digital converter chips. Background technique [0002] High-speed ADC chips (analog-to-digital converters) are widely used in the fields of radar, optical communication, software radio and mobile communication. With the continuous improvement of the conversion rate and sampling accuracy of ADC chips, the test tasks of a large number of chips after mass production are heavy and very important, and higher requirements are placed on the existing test system; the test tasks include testing various types of ADC chips. Characteristic parameters: static characteristics, dynamic characteristics, data\clock output characteristics and power consumption characteristics, etc. [0003] At present, mass production testing of chips in the field of chip manufacturing adopts te...

AI Technical Summary

Problems solved by technology

It can achieve a certain degree of rapid and automated testing of a large number of chips, but the testing scheme based on this equipment has many limitations, especially for high-speed ADC chips. The test accuracy of the static characteristics and dynamic characteristic parameters of the chip under test needs to provide adjustable frequency amplitude or high-precision analog input signal; for the data of the data output interface of the high-speed ADC chip under test, the processing core needs to provide adjustable Delayed delay IO module, and provide calibrated synchronous algorithm driver for high-speed ADC; high-speed computing core is required to ensure the fast operation of parameter processing algorithm; and corresponding upper computer control module is required to control the process or test equipment and display and store the results ; While completing the above functions, it is also necessary to ensure that the entire testing process takes a short time and is fully automatic

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