Semiconductor embedded mixed packaging structure, and manufacturing method of the same

Abstract

The invention discloses a semiconductor embedded mixed packaging structure, and a manufacturing method of the same. The embedded mixed packaging structure includes a circuit board, an opening or cavity, a semiconductor chip, a semiconductor chip package, packaging materials, and a rewiring layer, wherein the circuit board is provided with a first surface and a second surface which are arranged oppositely; the opening or cavity is arranged in the circuit board and is at least used for accommodating the semiconductor chip (Bare Die) and the semiconductor chip package (Semiconductor Package); the semiconductor chip is arranged in the opening or cavity; the semiconductor chip package is arranged in the opening or cavity; the packaging materials are at least used for covering the first surface of the circuit board and filling the space, unoccupied by the semiconductor chip and the semiconductor chip package, in the opening or cavity; and the rewiring layer is at least used for electrically connecting the semiconductor chip, the semiconductor chip package and the circuit board. The semiconductor embedded mixed packaging structure, and the manufacturing method of the same utilize the circuit board embedded technical scheme, and can simplify the integration technological process of the semiconductor chip and the semiconductor chip package, can improve the integration quality and performance, and can effectively reduce the integration area.

Description

technical field [0001] The invention relates to a circuit carrier packaging structure, in particular to a semiconductor embedded hybrid packaging structure and a manufacturing method thereof. Background technique [0002] In the prior art, the packaging of the semiconductor chip and the assembly of the semiconductor chip package are completed by the electronic packaging factory and the electronic assembly factory respectively. Firstly, the packaging of the semiconductor chip is completed, and then the semiconductor chip package is assembled on the circuit board. The assembly of the semiconductor chip package on the circuit board is usually completed by a surface mount process. [0003] Surface mount technology (Surface Mount Technology, SMT) is a method of mounting non-pin or short-lead surface mount components (SMC / SMD for short, Chinese chip components) on printed circuit boards (Printed Circuit Board, PCB) The circuit assembly technology that solders and assembles the su...

AI Technical Summary

Problems solved by technology

In addition, on the surface mount, the semiconductor chip package and the circuit board are usually electrically interconnected through a solder connection. At present, the solder connection of the surface mount requires a large pad and a pad pitch of the semiconductor package device, such as a solder joint. Pad / pad spacing = 280 microns / 400 microns, the precision needs to be improved, and the solder connection requires more complicated solder reflow process control;

[0007] In addition, the semiconductor chip package is assembled on the circuit board by surface mount method. Due to the increase in the area of ​​the semiconductor chip package, it will occupy a larger surface area of ​​the circuit board, which hinders the miniaturization of semiconductor package device assembly.

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