Low power consumption GPU (Graphic Process Unit) staining task and uniform staining array task field mapping structure
A low-power, high-task technology, applied in the direction of processor architecture/configuration, multi-program device, program control design, etc., can solve the problems of poor portability, GPU function, performance cannot be fully utilized, and constraints on display system development and independent development, etc. problems, to achieve the effect of low-power resource management methods
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[0028] Such as figure 1 As shown, the overall block diagram of the architecture of the low-power GPU dyeing task and the unified dyeing array task site mapping structure, an input data assembly and forwarding unit (1), a configuration and management unit (2), and a task management unit (3) , a resource management unit (4), and a slot state table unit (5).
[0029] The specific structure and function of each module are introduced in detail below:
[0030] 1. Input data assembly and forwarding unit (1): It is the main component of the on-site mapping structure of the low-power GPU dyeing task and the unified dyeing array task, and is the hardware carrier for mapping the input data of the dyeing task to the localsram of the specified slot inside the USA. This module implements several functions, including:
[0031] 1.1. Vertex warp assembly: the external GDU (graphics drawing unit) and GFU (graphics function unit) provide the input attribute data of vertex, the input data width...
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