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Preparation method for epitaxial wafer of GaN-based light emitting diode

A technology of light-emitting diodes and epitaxial wafers, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve problems such as lattice mismatch, lattice defects, and affecting LED photoelectric performance, and achieve the effect of improving photoelectric performance and growth quality

Active Publication Date: 2016-10-26
HC SEMITEK SUZHOU
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] There is a lattice mismatch between the sapphire substrate and GaN, and a large number of lattice defects will be introduced during the epitaxial growth process, which will reduce the growth quality of the multi-quantum well layer and affect the optoelectronic performance of the LED

Method used

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  • Preparation method for epitaxial wafer of GaN-based light emitting diode
  • Preparation method for epitaxial wafer of GaN-based light emitting diode

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Embodiment

[0026] An embodiment of the present invention provides a method for preparing an epitaxial wafer of a GaN-based light-emitting diode, see figure 1 , the preparation method comprises:

[0027] Step 100: cleaning the surface of the sapphire substrate.

[0028] Specifically, this step 100 may include:

[0029] The sapphire substrate was heated to 1110°C in a Metal-organic Chemical Vapor Deposition (MOCVD) reaction chamber, and the 2 ) atmosphere to anneal the sapphire substrate for 8 to 10 minutes.

[0030] In practical applications, a Si substrate or a SiC substrate may also be used to replace the sapphire substrate.

[0031] Step 101: growing a buffer layer on a sapphire substrate.

[0032] Specifically, this step 101 may include:

[0033] Control the growth temperature to 540°C, and grow a GaN buffer layer with a thickness of 30nm on the sapphire substrate.

[0034] Step 102: growing a non-doped GaN layer on the buffer layer.

[0035] Specifically, this step 102 may inc...

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Abstract

The invention discloses a preparation method for an epitaxial wafer of a GaN-based light emitting diode, and belongs to the technical field of a semiconductor. The preparation method comprises the steps of laminating a buffer layer, a non-doped GaN layer, an N type layer, a stress release layer, a multi-quantum well layer and a P type layer on a sapphire substrate in sequence, wherein the stress release layer comprises multiple stress release sub-layers, the stress release sub-layers comprise a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are laminated in sequence, the first sub-layer is an AIGaN layer, the third sub-layer is an InGaN layer, the second and fourth sub-layers are GaN layers, and the growth temperature of the first sub-layer is higher than that of the third sub-layer. According to the method, a periodic structure is employed in the stress release layer, the relatively low growth temperature is employed in the InGaN layer, thereby facilitating good growth of lattices, the stress generated between the sapphire substrate and the GaN layers due to lattice mismatch can be released, the growth quality of the multi-quantum well layer is improved, and the photoelectric property of the LED is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for preparing an epitaxial wafer of a GaN-based light-emitting diode. Background technique [0002] In the development of the light emitting diode (Light Emitting Diode, referred to as LED) industry, GaN, a wide bandgap (Eg>2.3eV) semiconductor material, is developing rapidly and is widely used in lighting, display screens, signal lights, backlights and other fields. How to improve the optoelectronic performance of GaN-based LEDs has always been a research hotspot in the LED industry. [0003] Existing LED epitaxial wafers include a sapphire substrate, a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer and a P-type GaN layer stacked sequentially on the substrate. Wherein, the multi-quantum well layer includes alternately stacked InGaN quantum well layers and GaN quantum barrier layers. The electrons in the N-type layer and ...

Claims

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Application Information

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IPC IPC(8): H01L33/00H01L33/12H01L33/06
CPCH01L33/007H01L33/06H01L33/12
Inventor 李昱桦乔楠从颖胡加辉
Owner HC SEMITEK SUZHOU
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