A memory array reading method based on single-phase conduction memory cells

Abstract

The invention provides a memory array reading method based on unidirectionally-connected memory cells. A memory array comprises multiple word lines, multiple bit lines intersecting with the word lines, multiple unidirectionally-connected memory cells which are arranged at the intersection points of the word lines and the bit lines and connected with the word lines and the bit lines and peripheral reading circuits for reading and writing the corresponding memory cells connected to the same bit lines. The method comprises the steps that first voltage is applied to the word line to which the selected memory cell belongs, and second voltage is applied to the other word lines of the memory array; meanwhile, the second voltage is applied to the bit line to which the selected memory cell belongs, and the first voltage is applied to the other bit lines; the bit line where the memory cell is located is read and written through the corresponding peripheral circuit.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to a memory array reading method based on a unidirectional conduction memory unit. Background technique [0002] Memory is used to store information. Memory is an important part of a computer and is composed of tens of millions of storage units. The arrangement of the memory is generally in the form of a rectangular array. The rows and columns of the matrix are called word lines and bit lines respectively, and the peripheral readout circuit performs read and write operations on each unit. [0003] In recent years, non-volatile memory (NVM) devices have played an increasingly important role in the development of memory due to their high density, high speed, and low power consumption. The current mass-produced non-volatile memory devices are mainly flash memory, but with the further development of integrated circuit technology, its read and write speed is too slow, th...

AI Technical Summary

Problems solved by technology

However, in the actual array application, there are serious misreading phenomena, and the peripheral readout circuit cannot correctly distinguish the resistance state change of the device.

In order to prevent misreading, each memory cell must be connected in series with a MOS transistor with selective characteristics, which will greatly increase the complexity of the process and increase the cost of the product

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