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Diode assist-triggered thyristor device and manufacturing method and integrated circuit thereof

A diode-assisted and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, circuits, semiconductor devices, etc., can solve problems such as increased design costs, protection devices that cannot be turned on in time, and long device turn-on time

Active Publication Date: 2016-05-04
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For the existing DTSCR devices, in order to reduce the static leakage current, it is necessary to increase the number of diodes, which will increase the layout area and increase the design cost; the turn-on time of the device under the VF-TLP (Very Fast-Transmission Line Pulse) test is longer , when the CDM (Charged Device) event occurs, the protection device cannot be turned on in time, causing the gate oxide layer of the internal core circuit to break down and fail

Method used

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  • Diode assist-triggered thyristor device and manufacturing method and integrated circuit thereof
  • Diode assist-triggered thyristor device and manufacturing method and integrated circuit thereof
  • Diode assist-triggered thyristor device and manufacturing method and integrated circuit thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] figure 1 It is a structural schematic diagram of a DTSCR device in the prior art, figure 1 Including five N well regions, specifically: P-type substrate 100;

[0037] On the P-type substrate 100, a first P+ implant region 112, a first N+ implant region 106, N well regions 101, 102, 103, 104 and 105 are sequentially formed, and a second P+ implant region and a second P+ implant region are formed in each N well region. The second N+ implant region, as shown in the figure, forms the second P+ implant region 113 on the side close to the first P+ implant region in the N well region 101, and forms the second N+ implant region 107 on the side away from the first P+ implant region ; In the N well region 102, a second P+ implant region 114 is formed on the side close to the first P+ implant region, and a second N+ implant region 108 is formed on the side away from the first P+ implant region; in the N well region 103, it is close to the first One side of the P+ implantation re...

Embodiment 2

[0056] On the basis of Embodiment 1, in the diode-assisted triggering thyristor device provided in this embodiment, the area of ​​the pattern formed on the surface of the substrate by the second P+ implantation region and the second N+ implantation region is along the direction away from the first P+ implantation region direction decreases and the areas of the second P+ implantation region and the second N+ implantation region located in the same N well region are equal.

[0057] It should be noted that the area of ​​the pattern formed by the second P+ implantation region and the second N+ implantation region on the surface of the substrate decreases along the direction away from the first P+ implantation region. This design method ensures that the current gradually increases. , to avoid the damage of the device caused by the accumulation of current in the area of ​​sudden change of area.

[0058] On the other hand, when the areas of the second P+ implantation region and the s...

Embodiment 3

[0061] On the basis of Embodiment 1, the diode-assisted triggering thyristor device provided in this embodiment includes a first P+ injection region, a first N+ injection region, a second P+ injection region closest to the first P+ injection region, and The pattern formed on the surface of the P-type substrate by the second N+ implanted region closest to the first P+ implanted region is a rectangle with equal areas and equal long sides, and the lines connecting the center points of all the rectangles are perpendicular to the long side.

[0062] Ensure that the injection region used for charge release on the substrate has the same area as the injection region in the well region closest to the injection region, which increases the interaction between the injection region in the well region and the injection region outside the well region The region area ensures the release effect of the first P+ implantation region and the first N+ implantation region.

[0063] The thyristor de...

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Abstract

The invention discloses a diode assist-triggered thyristor device, and a manufacturing method and an integrated circuit thereof. The device comprises a first P+ injection region, a first N+ injection region and at least two N well regions, which are sequentially arranged on a P-type substrate; each N well region is provided with a second P+ injection region near the first P+ injection region and a second N+ injection region far away from the first P+ injection region; the device also comprises a metal interconnection region, which is used for connecting the second N+ injection regions and the second P+ injection regions in the adjacent N well regions; the areas of patterns formed by the second P+ injection regions on the surface of the P-type substrate are not identically equal and are not greater than those of the patterns formed by the first P+ injection regions formed on the surface of the P-type substrate; and the areas of the patterns formed by the second N+ injection regions on the surface of the P-type substrate are not identically equal and are not greater than those of the patterns formed by the first N+ injection regions formed on the surface of the P-type substrate. The DTSCR device reduces the leakage current on the basis of not increasing the layout area and shortens the starting time of the DTSCR device in a VF-TLP test.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a diode-assisted triggering thyristor device, a manufacturing method thereof, and an integrated circuit. Background technique [0002] The electrostatic discharge (Electrostatic Discharge, ESD) phenomenon of integrated circuits is a transient process in which a large amount of charge is poured into the integrated circuit from the outside to the inside when the chip is floating. Since the internal resistance of the integrated circuit chip is very low, when the ESD phenomenon occurs, an instantaneous (time-consuming 100-200 nanoseconds, rise time is only about 0.1-10 nanoseconds), high peak (several amperes) current will be generated, and A large amount of Joule heat is generated, which will cause the failure of the integrated circuit chip. For deep submicron integrated circuits, diode-triggered silicon-controlled rectifiers (DiodeTriggeredSiliconControlled...

Claims

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Application Information

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IPC IPC(8): H01L27/02H01L29/06H01L21/822
CPCH01L21/822H01L27/0248H01L29/0684
Inventor 王源张立忠何燕冬张兴
Owner PEKING UNIV
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