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Three-dimensional memory and preparation method thereof

A memory, three-dimensional technology, applied in electrical components and other directions, can solve the problem of low space utilization of gating switches, reduce leakage current and thermal crosstalk, improve storage density, and reduce costs.

Active Publication Date: 2016-03-23
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] Aiming at the problems of needing additional gating switches and low space utilization in the three-dimensional memory in the prior art, the present invention aims to solve the above problems

Method used

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  • Three-dimensional memory and preparation method thereof

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preparation example Construction

[0071] Please refer to Figures 1-15. The present invention also provides a method for preparing a multi-layer three-dimensional memory, which is described by taking a double-layer memory as an example. The method includes:

[0072] Step 1: Carry out photolithography on the insulating or semiconductor substrate 100, and then prepare a layer of lower electrode 101 in the vertical direction on the substrate 100 after photolithography, and peel off to obtain the lower electrode 101 corresponding to the photolithographic pattern. The electrode material can be metal or non-metal with good conductivity, such as silver, copper, titanium-tungsten alloy, graphene, etc. The thickness of the lower electrode 101 is 100-500nm, and the structure after step 1 is shown in Figure 1;

[0073] Step 2: prepare another layer of lower electrothermal insulation layer 102, the material of the lower electrothermal insulation layer 102 is: nitride, oxide, sulfide or a mixture of two or more materials, th...

Embodiment 1

[0086] Step 1: Carry out photolithography on the silicon substrate with a layer of silicon dioxide insulating layer on the surface, and then prepare a layer of lower electrode on the substrate after photolithography. After peeling off, a strip-shaped lower electrode in the vertical direction is obtained. The electrode thickness is 100nm, and the lower electrode material is silver;

[0087] Step 2: Prepare another layer of lower electrothermal insulating layer, the lower insulating layer is slightly smaller than the lower electrode on the substrate, so that the lower electrode is partially exposed, the thickness is 500nm, and the material is SiO 2 ;

[0088] Step 3: Use micro-nano processing technology to prepare small holes in the middle of the lower electrothermal insulation layer, with a diameter of 50nm and a depth of 500nm;

[0089] Step 4: using chemical vapor deposition to fill the lower n-type semiconductor material plug column, the thickness of the n-type semiconducto...

Embodiment 2

[0100] Step 1: Carry out photolithography on the silicon substrate with a layer of silicon dioxide insulating layer on the surface, and then prepare a layer of lower electrode on the substrate after photolithography. After peeling off, a strip-shaped lower electrode in the vertical direction is obtained. The electrode thickness is 100nm, and the bottom electrode material is titanium;

[0101] Step 2: Prepare another layer of lower electrothermal insulating layer, the lower insulating layer is slightly smaller than the lower electrode on the substrate, so that the lower electrode is partially exposed, the thickness is 500nm, and the material is SiO 2 ;

[0102] Step 3: Use micro-nano processing technology to prepare small holes in the middle of the lower electrothermal insulation layer, with a diameter of 50nm and a depth of 500nm;

[0103] Step 4: using chemical vapor deposition to fill the lower n-type semiconductor material plug column, the thickness of the n-type semicondu...

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Abstract

The present invention aims to provide a three-dimensional memory and a preparation method thereof. The three-dimensional memory provided by the present invention is formed by vertically stacking a plurality of layers of memories. Each layer comprises: a strip electrode; an electric heating insulating layer; a small hole in the middle of the electric heating insulating layer; and an n-type semiconductor material plug column and a p-type storage material plug column inside the small hole. The memory can independently carry out reading and writing on each unit. The memory selects a p-type storage medium and an n-type semiconductor material to form a pn junction, the selected p-type storage material has dual functions and is not only the storage medium, but also a part of a gate tube. The memory is provided with the gate tube without using an additional transistor as a gating switch, so that a unit area can be greatly reduced, storage density can be greatly improved, and meanwhile, current leakage and thermal crosstalk can be effectively reduced.

Description

technical field [0001] The invention belongs to the technical field of micro-nano electronics, and in particular relates to a three-dimensional memory. Background technique [0002] It is currently a stage of explosive development of 3D memory technology. At present, three-dimensional memory such as 3D-NAND, 3D-RRAM, and 3DX-point has been proposed in the world. The three-dimensional memory has a vertical three-dimensional structure and is formed by stacking multiple layers of memory, which can effectively use the space area and greatly increase the storage density. It is the inevitable direction of future memory development. [0003] Phase-change memory (PCRAM) is an element based on the Ovsinski effect, and its core is a chalcogenide-based phase-change material. The storage medium of PCRAM can realize reversible transition between amorphous state and crystalline state under thermal induction. When the storage medium is in amorphous state and crystalline state, it will sh...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00
CPCH10N70/24H10N70/231H10N70/011H10N70/00
Inventor 缪向水颜柏寒童浩闫鹏
Owner HUAZHONG UNIV OF SCI & TECH
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