Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

On-chip reset system and reset method of SoC

A system-on-chip and chip technology, which is applied to the on-chip reset system and reset field of the system-on-chip, can solve problems such as incorrect chip working status and unstable chip working status, so as to improve register scalability and meet the start-up time Requirements, cost reduction effect

Active Publication Date: 2018-11-02
THE 44TH INST OF CHINA ELECTRONICS TECH GROUP CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem that the chip reset system and method of the SOC chip in the prior art may cause the chip working state to be unstable, or cause the chip working state to be incorrect, etc., the present invention proposes an on-chip reset system and reset method for a system-on-chip chip

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • On-chip reset system and reset method of SoC
  • On-chip reset system and reset method of SoC
  • On-chip reset system and reset method of SoC

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] attached figure 1 It is a schematic diagram of the on-chip reset system of the system-on-chip chip of the present invention. In the figure, 101 is a button reset signal, 102 is a power-on reset signal, 103 is a reset signal, 104 is a SOC chip main frequency clock signal, and 201 is an off-chip button reset circuit, 202 is an off-chip crystal oscillator circuit, 203 is a chip power-on circuit, 204 is a crystal oscillator clock control circuit, 205 is a reset signal selection circuit, 206 is a reset level pulse generation circuit, 207 is an asynchronous reset synchronous release circuit, and 208 is a control circuit Register, 209 is an RC clock circuit, 210 is a digital frequency division circuit, 211 is a clock selection logic circuit, 212 is a delay circuit, and 213 is a clock switching circuit. As can be seen from the figure, the on-chip reset system of the SoC chip of the present invention includes an off-chip button reset circuit 201, an off-chip crystal oscillator c...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention proposes an in-chip reset system and reset method for a system-on-chip chip. The system comprises an off-chip key reset circuit, an off-chip crystal oscillation circuit, a chip power-on circuit, a crystal oscillation clock control circuit, a reset signal selection circuit, a reset level pulse generation circuit, an asynchronous reset and synchronous release circuit, a control register, an RC clock circuit, a digital frequency division circuit, a clock selection logic circuit, a delay circuit and a clock switching circuit, wherein except the off-chip key reset circuit and the off-chip crystal oscillation circuit, the rest of circuit modules are all integrated in the system-on-chip (SOC) chip. The in-chip reset system and reset method for the system-on-chip chip have the beneficial technical effects that most circuit modules are integrated in the SOC chip, so that the area is reduced and the cost is lowered; and on the basis of not adding additional circuits, an off-chip key reset mode is effectively combined with an in-chip power-on reset mode, so that the reset system is convenient and easy to use.

Description

technical field [0001] The invention relates to an on-chip system chip reset technology, in particular to an on-chip system chip internal reset system and reset method. Background technique [0002] With the rapid development of integrated circuit technology, the circuit functions in the chip are becoming more and more complex, and more and more functions are integrated in a single chip. Develop towards the systematic direction of multifunctional IP integration. Among them, a system on chip (System on Chip, hereinafter referred to as SOC) chip has become a main solution to replace traditional integrated circuits, and has become an inevitable trend in the development of current microelectronic chip technology. [0003] The SOC chip is usually integrated with a processor (including CPU, DSP), memory and various interface control modules. Various functional modules are combined according to a certain connection relationship to form a complex system-on-chip. Usually, a SOC chi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/24
CPCG06F1/24
Inventor 任思伟刘昌举祝晓笑吴治军李毅强张靖邓光平李明刘业琦李梦萄
Owner THE 44TH INST OF CHINA ELECTRONICS TECH GROUP CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products