High threshold voltage power mos chip, device and method for increasing threshold voltage

A high-threshold voltage, MOS device technology, applied in the design of MOS devices, the realized MOS devices, and the manufacturing field, can solve the problems of device on-resistance and other parameters increase, device performance degradation, device failure, etc., to achieve a simple threshold voltage , Increase the threshold voltage, the effect of threshold voltage increase

Active Publication Date: 2017-11-10
成都方舟微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The threshold voltage of the device is increased by adjusting the dopant ion concentration in the well region 13, but the performance of the device is greatly reduced, and the on-resistance and other parameters of the device will be greatly increased.
[0006] Moreover, power MOS devices are static-sensitive devices. Devices will inevitably be damaged by static electricity during assembly and testing. Device failure caused by electrostatic shock has become the main mode of device failure.

Method used

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  • High threshold voltage power mos chip, device and method for increasing threshold voltage
  • High threshold voltage power mos chip, device and method for increasing threshold voltage
  • High threshold voltage power mos chip, device and method for increasing threshold voltage

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0056] Figure 4 The circuit schematic diagram of the existing depletion-type N-channel power MOS device is given; in the figure, the depletion-type N-channel MOS device includes a chip, a package body, and pins. The pins include a device source S, a device gate G, and a device drain D; the chip includes an active region 10 (the active region 10 is an active region of a depletion-type N-channel MOS chip), Wire bonding area 30 (including source wire bonding area 31 and polysilicon gate wire bonding area 33); source 1 and polysilicon gate 3 on active area 10 respectively pass through corresponding source wire bonding area 31 and polysilicon gate wire bonding The region 33 is electrically connected to the device source S and the device gate G. The drain 5 is generally a metal layer itself, which is directly electrically connected to the device drain D, and is packaged by the package body 40 to form a depletion-type N-channel. channel MOS devices. Since its specific structure an...

Embodiment 2

[0070] Compared with Embodiment 1, the difference of this embodiment lies mainly in its active region 10, and other parts are similar to Embodiment 1. In order to simplify the description, the following mainly lies in the description of the differences, and only a brief description of other parts. The description is sufficient to enable clear and unambiguous understanding to those of ordinary skill in the art.

[0071] Figure 7 A schematic circuit diagram of an existing depletion-type P-channel power MOS device is provided; the difference between it and Embodiment 1 is the active region 10 of the depletion-type P-channel power MOS chip in this embodiment , others are similar to Embodiment 1, and the structure and manufacturing process are all prior art, well known to those skilled in the art, and will not be repeated here. Based on this, the present invention makes the following improvements.

[0072] Figure 8 Demonstrated the circuit principle of high threshold voltage d...

Embodiment 3

[0076] Compared with Embodiment 1, the difference of this embodiment lies mainly in its active region 10, and other parts are similar to Embodiment 1. In order to simplify the description, the following mainly lies in the description of the differences, and only a brief description of other parts. The description is sufficient to enable clear and unambiguous understanding to those of ordinary skill in the art.

[0077] Figure 9 A schematic circuit diagram of an existing enhanced N-channel power MOS device is given; the difference from Embodiment 1 is the active region 10 of the enhanced N-channel power MOS chip in this embodiment, Others are similar to Embodiment 1, and the structure and manufacturing process are all prior art and well known to those skilled in the art, and will not be repeated here. Based on this, the present invention makes the following improvements.

[0078] Figure 10 The circuit principle of the high threshold voltage enhanced N-channel power MOS dev...

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PUM

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Abstract

The invention provides power metal oxide semiconductor (MOS) chip and device with high threshold voltage and a method for improving the threshold voltage. The chip comprises an active region and a routing region of the power MOS chip including more than one cell, wherein the active region comprises a source, a polysilicon gate and a drain; the routing region comprises a source routing region and a polysilicon gate routing region, which are respectively used for routing the source and the polysilicon gate; the power MOS chip is characterized by further comprising a diode region; the diode region comprises a first zener diode and a second zener diode; the second zener diode is connected between the polysilicon gate and the source in parallel; and the first zener diode is connected with the polysilicon gate in series. The invention discloses the device which is formed by encapsulation on the basis of the chip, and the method for improving the threshold voltage of the power MOS device. Through layout designs of the device and the chip, the threshold of the device is improved; and the anti-electro-static discharge (ESD) capability of the device can be greatly improved by these zener diodes.

Description

technical field [0001] The invention relates to the field of design and manufacture of semiconductor devices, especially the design and manufacture of MOS devices and the realized MOS devices. Background technique [0002] As the core device in the field of power management, power MOS devices (hereinafter referred to as MOS) have significant advantages such as voltage drive, fast switching speed, wide safe operating area, and positive temperature coefficient. Power MOS devices are widely used in computers, network communications, and consumer electronics. , industrial electronics, automotive electronics and semiconductor lighting and other fields. Power MOS devices can be divided into N-channel and P-channel according to the channel type, and can be divided into enhancement type and depletion type according to the switch type. In some specific application fields, power MOS devices with higher threshold voltages are required, especially depletion-type power MOS devices (here...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02
CPCH01L27/0255
Inventor 张少锋周仲建钟川
Owner 成都方舟微电子有限公司
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